University of Michigan

Benjamin Allen Vandersloot

Trevor N Mudge

Yiping Kang

Joseph Michael Pusdesris

Andrea Pellegrini

A data processing apparatus has a memory rename table for storing memory rename entries each identifying a mapping between a memory address of a location in memory and a mapped register of a plurality of registers. The mapped register is identified by a register number. In response to a store instruction, the store target memory address of the store instruction is mapped to a store destination register and so the data value is stored to the store destination register instead of memory. A memory rename entry is provided in the table to identify the mapping between the store target memory address and store destination target register. In response to a load instruction, if there is a hit in the memory rename table for the load target memory address then the loaded value can be read from the mapped register instead of memory.

Growing community of inventors

Ann Arbor, MI, United States of America

Benjamin Allen Vandersloot