Dell Products Inc.

Dell USA L P

Benjamen G Tyner

Mark A Larson

Joshua Alperin

Ajay Kwatra

Alok Pant

Kendall C Witte

James E Dailey

James F Shields

Peter A Woytovech

Andy W Wong

An information handling system which supports Pre-Boot Authentication (PBA) and which provides the ability for each authorized user of the system to have a unique ID and key at the BIOS level. In these systems, a user only needs knowledge of the traditional BIOS password only at the time the user is enrolled in the PBA feature. Later changes to the password do not have the effect of denying access to enrolled users.

Multi-user BIOS authentication

In a computer system or information handling system, a virtual system event provides for the communication of the notification of a system events from the hardware of the computer system to the power and configuration management system of the computer system.

System and method for managing system events by creating virtual events in an information handling system

An information handling system security system validates authorization to selected information by establishing physical access of a user to the information handling system through activation by the user of a power switch of the information handling system. Upon detection of an attempt to access the limited access information, a trusted platform module disables power functionality of the power switch and enables a physical access validation mode that validates physical access of a user to the information handling system before allowing access to the limited access information. Failure to confirm physical access by activation of the power switch precludes access to the information. Validation of physical access by activation of the power switch allows access to the information and returns normal power functionality to the power switch.

Method and system for validating physical access to an information handling system

An information handling system cooling fan operating curve is automatically selected for use by a cooling fan controller by detecting the configuration of the information handling system and looking up cooling fan operating parameters from a table associated with the information handling system. For instance, central processing unit identification information is used to select associated cooling fan operating parameters so that adequate cooling is available to meet system cooling constraints for the heat characteristics of the central processing unit with reduced acoustic impact associated with operation of the information handling system.

System and method for information handling system cooling fan operating parameter selection

The present invention provides a method of executing a system setup program in an information handling system which includes setting a system setup indication during operation of the information handling system. The system setup indication is persistent and reboots the information handling system. The system setup indication indicates a desire for the information handling system to execute the system setup program and executes the system setup program if the system setup indication so indicates. The invention relates to an information handling system which includes a processor, a memory coupled to the processor, and a basic input output system (BIOS) stored on the memory. The memory includes a volatile portion and a non-volatile portion. The non-volatile portion includes a storage location for a system setup indication. The basic input output system (BIOS) examines the system setup indication during booting of the information handling system and determines whether the information handling system should execute a system setup program. Further, the invention relates to an apparatus for executing a system setup program in an information handling system. The information handling system includes setting a system setup indication during operation of the information handling system. The system setup indication is persistent and reboots the information handling system. The system setup indication indicates a desire for the information handling system to execute the system setup program and executes the system setup program if the system setup indication so indicates.

Setting a system indication in response to a user when execution of the system setup program is desired

A method, computer program product and computer system that features intermittently entering the system management mode of a processor to commence and terminate I/O activity between external devices and computer system resources. To that end, a system management interrupt handler is included that monitors bus transactions between a bus controller and an external device that is the subject of I/O activity. Upon sensing the completion of a bus transaction, the system management interrupt handler transmits a system management interrupt to the processor. In response thereto, the processor reads a buffer in the bus controller and provides the requisite resources with the I/O information contained therein.

Background execution of universal serial bus transactions

Provided is a method, a computer program product, and a computer system each of which features queuing data transfers between a data port and a system memory to minimize the latency between queuing a data transfer and effectuating the transfer of the same and to remove the chance of more than one device trying to talk to the OS at the same time through the same port. This facilitates backwards compatibility of non-USB compatible computer resources, such as applications, operating systems (O/S) and the like, with USB compatible peripheral devices.

Universal serial bus PC synchronization algorithm for peripheral devices

A system for restricting access to environmental circuits of a computer system. In one embodiment, the environmental circuits are accessible via a serial computer bus that conforms to a system management (SM) specification. I/O accesses to I/O registers assigned to a bus controller of the bus are trapped, wherein an interrupt such as a system management interrupt (SMI) is generated to invoke an interrupt handler that determines whether the I/O access corresponds to a restricted circuit access. If the I/O access corresponds to a restricted circuit access, then the interrupt handler prevents the circuit access from occurring. In one embodiment, I/O accesses to the I/O control register assigned to the bus controller are trapped. The interrupt handler determines whether a circuit access is restricted by reading the contents of the I/O address register and I/O command register assigned to the bus controller.

Access restriction of environmental circuits

A computer system having bus controller operating code stored in a non operating system managed, extended portion of system memory. In one example, the operating code is executed by a bus controller for a computer bus conforming to the Universal Serial Bus (USB) specification. In one example, the bus controller operating code is stored in a portion of system memory that is located above the top system memory address reported to the operating system, thereby hiding the stored code from the operating system. In one example, the bus controller operating code is constructed during the startup of the computer system with a code construction routine. Storing bus controller operating code in a non operating system managed, extended portion of system memory provides a computer system greater flexibility in system memory usage.

Bus controller operating code in system memory

A system and method for handling system management interrupts in a multi-processor computer is disclosed. When the computer enters system management mode, the method uses the registers of each processor to get currently executing opcode to determine what each processor was doing before the interrupt. The method may have to first translate address information to locate the actual physical location of the currently executing opcode. The registers are stored in memory and the contents of the registers can be used to determine if the current processor caused the system management interrupt. If so, then the method now knows which processor caused the interrupt and can handle the interrupt accordingly. If, however, the processor was not the one that caused the interrupt, or if another processor also caused an interrupt, the method then repeats the above steps for the next processor of the multiprocessor system.

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Austin, TX, United States of America

Benjamen G Tyner