Applied Materials, Inc.

Bencherki Mebarki

Mehul B Naik

Xianmin Tang

Srinivas D Nemani

He Ren

Joung Joo Lee

Ludovic Godet

Huixiong Dai

Li Yan Miao

Christopher Dennis Bencher

Paul F Ma

Bok Hoen Kim

Kaushal Kishore Singh

Annamalai Lakshmanan

Andrew Cockburn

Ellie Y Yieh

Philip Allan Kraus

Deenesh Padhi

Pramit Manna

Sean S Kang

Christopher S Ngai

Keith Tatseun Wong

Yongmei Chen

Tejinder Singh

Byeong Chan Lee

David P Thompson

Michael Wayne Stowell, Jr

John C Forster

Kelvin Chan

Anantha K Subramani

Keith A Miller

Thomas B Brezoczky

Thai Cheng Chua

Yu Lei

Roey Shaviv

Chentsau Chris Ying

Xinhai Han

Jinxin Fu

Steven Victor Sansoni

Mei-Yee Shek

Wenhui Wang

Yi Xu

Sundar Ramamurthy

Prashanth Kothnur

Daniel Lee Diehl

Nagarajan Rajagopalan

Nikolaos Bekiaris

Zhiyuan Wu

Jie Zhou

John Joseph Mazzocco

Amit Khandelwal

Hanh D Nguyen

Ismail T Emesh

Ben-Li Sheu

Heung Lak Park

Alexander Jansen

Jen Shu

Minrui Yu

Farzad Houshmand

Kenlin Huang

Yang Guo

Chikuang Charles Wang

Maximillian Clemons

Ji Ae Park

Guannan Chen

Sree Rangasai Kesapragada

Christian Valencia

Praburam Gopal Raja

Linh Thanh

Sudarsan Srinivasan

Jerome Machillot

Maximilian Clemons

Embodiments disclosed herein include methods and apparatuses used to deposit graphene layers. In an embodiment, a method of depositing a graphene layer on a substrate comprises providing a substrate within a modular microwave plasma chamber, and flowing a carbon source and a hydrogen source into the modular microwave plasma chamber. In an embodiment, the method further comprises striking a plasma in the modular microwave plasma chamber, where a substrate temperature is below approximately 400° C., and depositing the graphene layer on the substrate.

Method and apparatus of low temperature plasma enhanced chemical vapor deposition of graphene

Embodiments described herein relate to encapsulated nanostructured optical devices and methods of encapsulating gratings of such devices by asymmetric selective physical vapor deposition (PVD). In some embodiments, a method for encapsulating optical device gratings includes a first PVD process and a second PVD process that may be carried out simultaneously or sequentially. The first PVD process may provide a first stream of material at a first angle non-perpendicular to a substrate of the grating. The second PVD process may provide a second stream of material at a second angle non-perpendicular to the substrate of the grating. The combination of the first PVD process and the second PVD process forms an encapsulation layer over the grating and one or more air gaps between adjacent fins of the grating.

PVD directional deposition for encapsulation

Method for selectively oxidizing the dielectric surface of a substrate surface comprising a dielectric surface and a metal surface are discussed. Method for cleaning a substrate surface comprising a dielectric surface and a metal surface are also discussed. The disclosed methods oxidize the dielectric surface and/or clean the substrate surface using a plasma generated from hydrogen gas and oxygen gas. The disclosed method may be performed in a single step without the use of separate competing oxidation and reduction reactions. The disclosed methods may be performed at a constant temperature and/or within a single processing chamber.

Selective oxidation and simplified pre-clean

Method of forming an electronic device with a bottom isolation dielectric between a pair of gate stacks is described. Each of the gate stacks comprises a plurality of gate layers. A sacrificial film having a liner on a top and side thereof is on top of the gate layers. A capping layer is on the top of the liner.

Method of forming a bottom isolation dielectric by directional sputtering of a capping layer over a pair of stacks

Methods and apparatus for low angle, selective plasma deposition on a substrate. A plasma chamber uses a process chamber having an inner processing volume, a three dimensional (3D) magnetron with a sputtering target with a hollow inner area that overlaps at least a portion of sides of the sputtering target and moves in a linear motion over a length of the sputtering target, a housing surrounding the 3D magnetron and the sputtering target such that at least one side of the housing exposes the hollow inner area of the sputtering target, and a linear channel interposed between the housing and a wall of the process chamber.

Methods and apparatus for producing low angle depositions

Methods and apparatus for control of the quality of films deposited via physical vapor deposition are provided herein. In some embodiments, a method of depositing a film using linear scan physical vapor deposition includes: determining a deposition rate of a material to be deposited on a substrate in a linear scan physical vapor deposition process; calculating a scan rate of the substrate to achieve deposition of the material to a desired thickness in a single pass when deposited at the deposition rate; and performing the linear scan physical vapor deposition process while moving the substrate at the calculated scan rate.

Film quality control in a linear scan physical vapor deposition process

Methods and apparatus for processing a substrate are provided herein. In some embodiments, a method for processing a substrate includes: directing a stream of material from a PVD source toward a surface of a substrate at a first non-perpendicular angle to the plane of the surface to deposit the material on one or more features on the substrate and form a first overhang; etching the layer of the substrate beneath the features selective to the deposited material to form a first part of a pattern; removing the material from the features; directing the stream of material from the PVD source toward the surface of the substrate at a second non-perpendicular angle to the plane of the surface to deposit the material on the features on the substrate and form a second overhang; and etching the layer of the substrate beneath the features selective to the deposited material to form a second part of the pattern.

Methods and apparatus for patterning substrates using asymmetric physical vapor deposition

Methods and apparatus for processing a substrate. The method, for example, includes directing a stream of material from a PVD source at a first non-perpendicular angle to selectively deposit the material on a top portion of one or more features on the substrate and form a first overhang and a second overhang extending beyond a third sidewall and a fourth sidewall that are arranged parallel and opposite to each other and at non-zero angles to a first sidewall and a second sidewall, the first sidewall and the second sidewall defining a length of the one or more features, and the third sidewall and fourth sidewall defining a width of the one or more features; performing an etch process to selectively remove some of the first sidewall and the second sidewall while keeping the third sidewall and fourth sidewall in intact and maintaining the width of the one or more features.

Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.

Methods for forming a metal silicide interconnection nanowire structure

Methods for forming low resistivity metal silicide interconnects using one or a combination of a physical vapor deposition (PVD) process and an anneal process are described herein. In one embodiment, a method of forming a plurality of wire interconnects includes flowing a sputtering gas into a processing volume of a processing chamber, applying a power to a target disposed in the processing volume, forming a plasma in a region proximate to the sputtering surface of the target, and depositing the metal and silicon layer on the surface of the substrate. Herein, the first target comprises a metal silicon alloy and a sputtering surface thereof is angled with respect to a surface of the substrate at between about 10&#xb0; and about 50&#xb0;.

Methods of forming metal silicide layers and metal silicide layers formed therefrom

Methods and apparatus for asymmetric selective physical vapor deposition (PVD) are provided herein. In some embodiments, a method for physical vapor deposition (PVD) includes providing a stream of a first material from a first PVD source towards a surface of a substrate at a first non-perpendicular angle to the plane of the substrate surface, directing the stream of the first material through a first collimator having at least one opening to limit an angular range of first material passing through the at least one opening; depositing the first material only on a top portion and a first sidewall of at least one feature formed on the substrate surface, and linearly scan the substrate through the stream of first material via the substrate support to deposit the first material only on a top portion and a first sidewall of all features formed on the substrate.

Method and apparatus for asymmetric selective physical vapor deposition

A method of forming an interconnect structure for semiconductor or MEMS structures at a 10 nm Node (16 nm HPCD) down to 5 nm Node (7 nm HPCD), or lower, where the conductive contacts of the interconnect structure are fabricated using solely subtractive techniques applied to conformal layers of conductive materials.

Self-aligned interconnects formed using subtractive techniques

Methods for asymmetric deposition of a material on a structure formed on a substrate are provided herein. In some embodiments, a method for asymmetric deposition of a material includes forming a plasma from a process gas comprising ionized fluorocarbon (CxFy) particles, depositing an asymmetric fluorocarbon (CxFy) polymer coating on a first sidewall and a bottom portion of an opening formed in a first dielectric layer using angled CxFy ions, depositing a metal, metallic nitride, or metallic oxide on a second sidewall of the opening, and removing the CxFy polymer coating from the first sidewall and the bottom portion of the opening to leave an asymmetric deposition of the metal, metallic nitride, or metallic oxide on the structure.

Methods for asymmetric deposition of metal on high aspect ratio nanostructures

Aspects of the disclosure include methods of treating a substrate to remove one or more of voids, seams, and grain boundaries from interconnects formed on the substrate. The method includes heating the substrate in an environment pressurized at supra-atmospheric pressure. In one example, the substrate may be heated in a hydrogen-containing atmosphere.

Seam-healing method upon supra-atmospheric process in diffusion promoting ambient

Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide stack comprising as plurality of metal silicide layers on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide stack in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer.

Laminate and core shell formation of silicide nanowire

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Santa Clara, CA, United States of America

Bencherki Mebarki