Nvidia Corporation

Ben Pei En Tsai

Zheng Wu

Ziyi Xu

Xuan Wang

Technologies directed to control circuits to adjust input current settings of input current limiter (ICL) circuits are described. One integrated circuit includes a processing core, an ICL circuit, and a control circuit. The ICL circuit has a first input current setting to limit an input current signal provided to the processing core to a current limit. The control circuit can receive digital samples from the ICL circuit with the first input current setting in response to one or more transient response tests. Using the digital samples, the control circuit can determine a response characteristic of a transient response of the input current signal. The control circuit can adjust the first input current setting to a second input current setting until the response characteristic satisfies a condition.

Adaptive control for input current limit setting

Technologies directed to input current limiter (ICL) circuits with frequency control loops are described. One integrated circuit includes a processing core and an ICL circuit. The ICL circuit can limit an input current to the processing core within a current limit of the processing core. The ICL circuit can determine an input current and a supply voltage provided to the processing core at a first time. The ICL circuit can reduce a clock of the processing core from a first clock frequency to a second clock frequency with a linear frequency drop based on the current limit, the input current, and the supply voltage. value, the second value, and the third value. The first clock frequency corresponds to a first voltage, and the second frequency corresponds to a second voltage. The ICL circuit can reduce the clock to a third clock frequency corresponding to a third voltage.

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Uusimaa, Finland

Ben Pei En Tsai