Hewlett-packard Company

Hewlett-packard Corporation

Ben Flugstad

Daniel J Powers

Barton L McJunkin

Raymond L Fried

Mark D Talbot

Judith Cyrus

Alan Hedge

A defibfillator has a self healing storage capacitor connected in parallel with a safety resistor, and a microcontroller. Upon receipt of a calibration request, the microcontroller charges the capacitor to a charging voltage greater than a starting voltage, then discharges the capacitor through the safety resistor. As the capacitor is discharging, the microcontroller continuously measures the voltage across the capacitor. When the microcontroller detects that the voltage across the capacitor is less than or equal to a starting voltage, a timer in the microcontroller is started. When the microcontroller detects that the voltage across the capacitor is less than or equal to an ending voltage, the timer in the microcontroller is stopped. The microcontroller then determines an elapsed time between the time the timer was started and stopped. The microcontroller then calculates a capacitance value of the capacitor based on the starting voltage, the ending voltage, and the elapsed time. This capacitance value is stored in memory, and used to calibrate the energy output of the defibrillator by assuring that the self healing storage capacitor has been charged to a voltage level sufficient to deliver the desired amount of energy to a patient.

Method and apparatus for calibrating the energy output of a defibrillator

A phase-locked loop (PLL) frequency synthesizer having an analog, out-of-band component path and a digital, in-band component path to provide frequency modulation (FM) of the synthesized output signal is described. The in-band FM component is octave scaled by an analog scaling means and coupled to an analog-to-digital converter to provide a digital number to be decade added to the PLL divide number to change the PLL frequency in response to the in-band FM signal. The out-of-band FM component is also scaled and applied to a loop summing node and summed with the PLL error signal to vary the PLL frequency. The scaling in both the in-band component path and out-of-band component path is equalized to provide a flat frequency response. Additional, the in-band component is scaled to allow use of the analog-to-digital converter over its maximum range to maintain a high signal-to-noise ratio.

Frequency modulation in phase-locked loops

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McMinnville, OR, United States of America

Ben Flugstad