Thomson Consumer Electronics Inc.

Thomson Licensing S.a.

Rca Licensing Corporation

Thomson Licensing

Other

Barth Alan Canfield

Donald Henry Willis

Billy Wesley Beyers

Wai-Man Lam

Haoping Yu

Richard W Citta

Russell T Fling

Mark Alan Schultz

David J Duffield

John Alan Hague

Jianlei James Xie

David Emery Virag

Steven Anthony Barron

Mark Francis Rumreich

Nathaniel H Ersoz

Scott Matthew Lopresto

David Lowell McNeely

Harold Blatter

Enrique Rodriguez-Cavazos

Robert D Altmanshofer

Steven Wayne Patton

Friedrich Rominger

Todd Christopher

Detlef Teichner

Heinrich Schemmann

Nataniel H Ersoz

Nathaniel Haluk Ersoz

Robert Dale Altmanshofer

The present invention concerns a system for transmitting a plurality of modes of digital television signals within the same transmission channel where one transmission mode is more robust than another mode. The present invention also concerns a system for receiving and decoding such signals. More specifically, an aspect of the present invention involves a method and an apparatus for utilizing a proper length of preamble data for the improvement of reception. Furthermore, another aspect of the present invention involves a method and an apparatus for inserting a preamble into a proper place in a transmitted data stream relative to the filed synchronization data. Another aspect of the present invention involves a method and an apparatus for decoding trellis-coded data, using the predetermined preamble data.

Preamble for a digital television system

Information is transmitted indicating when a burst mode will take place which intervenes during a regular transmission mode. The information transmitted can also include information indicating how long such a burst mode will be and the contents of the burst mode where such contents can be identified as video, audio, system information, advertisements, or interactive content.

Apparatus and method for communicating burst mode activity

New capabilities will allow conventional broadcast transmission to be available to mobile devices. The present embodiments describe an apparatus and method for encoding and decoding signals. A method includes the steps of generating data blocks, encoding a first set of data blocks using a first encoding rate, encoding a second set of data blocks using a second encoding rate, and generating a control packet, the control packet identifying the first set of data blocks and the first encoding rate, and identifying the second set of data blocks and the second encoding rate. An apparatus includes a first decoder receiving data and decoding a first subset of the data, including a control packet, at a first decoding rate and a controller controlling the operation of the first decoder based on the decoded control packet.

Apparatus and method for encoding and decoding signals

A video decoder transcodes video data from various input formats to a predetermined output format. Input data may be standard definition data or MPEG2 compressed data. Standard definition data are rearranged into block format to be compatible with the decoder's single display processor. The display processor selectively processes and conveys either MPEG2 format data or non-MPEG2 format data to a display device. A block based frame memory stores MPEG2 and non-MPEG2 pixel block data, as well as standard definition data in raster line format during processing.

Memory architecture for a multiple format video signal processor

An image processor produces a DPCM prediction error to be quantized. If the prediction error value is positive, the value passes unchanged to a quantizer. If the prediction error value is negative, a bias value is added to the prediction error value to produce a positive number within the operating limits of the quantizer. Biased prediction error values are quantized. Because all values received by the quantizer are positive and within the current quantizer limits, the quantization table used by the quantizer need not include quantization values for negative prediction error values. This reduces the scope of prediction error values by a factor of two, doubling quantization resolution.

Memory efficient compression apparatus in an image processing system

An MPEG coded and compressed video signal is received and decompressed for display. Prior to storing frames required for motion compensation in memory, pixel blocks are recompressed into DPCM prediction error values to reduce bandwidth and frame memory requirements. Fixed length quantization and dequantization tables (FIG. ) have N levels (e.g., 15 levels), and each level has an associated output symbol of predominantly M bits (e.g., 4 bits), except that at least one of said N levels (e.g., level ) is defined by a unique short symbol having less than M bits (e.g., 3 bits), and input data for that level is received at a desired rate. Each time a short symbol is used to represent a data value, bandwidth and memory are reduced and/or preserved for other uses, for example, inserting overhead data into a fixed-size data stream. For large sequences of data, such as exists for video data for example, the reduction in memory and bandwidth is significant.

Data efficient quantization table for a digital video signal processor

A multimode scan converter includes a delay element ( ) for delaying one horizontal line of video signal and selectively re-displaying that line. A multiplexer ( ) is arranged to selectively provide either luminance signal or chrominance signal to the delay element. Output signal from the delay element and output signal from the multiplexer are coupled to a proportioning circuit ( ) which sums the two signals in complementary proportions (e.g. K and 1-K). A second multiplexer ( ), which provides up-converted output luminance signal, is arranged to selectively pass the luminance signal or signal from the proportioning circuit. A third multiplexer ( ), which provides up-converted output chrominance signal, is arranged to selectively pass the chrominance signal or signal from the proportioning circuit.

Multimode interpolation filter as for a TV receiver

An apparatus for reproducing a digitally encoded signal from a disk medium, comprises a transducerwhich transduces the digitally encoded signal. A memory is coupled to the transducer for storing the digitally encoded signal. A decoder is responsive to the digitally encoded signal for decoding a picture therefrom. A controller for the memory, wherein a first operational mode the controller controls the memory to read the stored digitally encoded signal from the memory responsive to a first sequence and in a second operational mode the controller controls the memory to read the stored digitally encoded signal from the memory in a second sequence.

Random picture decoding

An apparatus for reproducing a digitally encoded signal from a medium, comprises a transducer for transducing the digitally encoded signal and generating a bit stream therefrom. A processor is coupled to receive the bit stream for controllably processing the bit stream. A memory is coupled to the processor for storing the processed bit stream information. A controller is coupled to control the memory and the processor for controlling identification of information within the bit stream, wherein the controller controls the processor to identify a specific sector type in the bit stream and responsive to the specific sector identification the controller controls the memory for storing the identified specific sector.

Replay bit stream searching

A programmable synchronizing system for selectively providing synchronizing signals at different rates, such as for incorporation in a video signal decompression system, includes an oscillator and a programmable counter. The programmable counter is conditioned to count pulses from the oscillator by alternate moduli in predetermined sequences to generate the synchronizing signals. The desired synchronization rate is effectively the average of the counter output resulting from counting by the alternate moduli.

Method and apparatus for generating variable rate synchronization signals

A memory efficient image processor receives DPCM prediction error values from decompressed MPEG coded digital video signals in the form of pixel blocks containing luminance and chrominance data in a 4:2:2 or 4:2:0 format and recompresses the pixel blocks to a predetermined resolution. Luminance and chrominance data are processed with different compression laws during recompression. Luminance data are recompressed to an average of six bits per pixel, and only a reference pixel and one other pixel are processed separately from all other luminance pixels in a block. Chrominance data are recompressed to an average of four bits per pixel. Each pixel block is stored with overhead information facilitating efficient and accurate reconstruction. Accurate pixel reconstruction is facilitated by processing a reference pixel accurately; scaling the pixel block; employing quantization tables which are symmetrical and fitted to the domain of the pixel block; biasing negative prediction error values to positive values; using short codewords in quantization tables at levels which are most likely to occur statistically; and processing each pixel with three, four or five bit quantization to ensure maximum resolution and an overall four-bit average for the pixel block.

Pixel block compression apparatus in an image processing system

A video processor receives coded digital image data which is decoded into MPEG compatible pixel blocks. The pixel blocks are horizontally and vertically decimated to produce a reduced size image suitable for picture-in-picture, picture-on-picture, or picture-in-graphics display. Decoded input data to the decimation network is alias filtered and decimated at a factor of 8 to 3. Decimated output pixel data is derived solely from a respectively associated decoded input pixel block.

Decimation of a high definition video signal

Video processing image manipulation and trick play modes provide seamless normal play and trick play functioning. Specifically, a system processes video data including encoded digital packetized data representative of a sequence of individual images and ancillary data identifying characteristics of the individual images. The system involves a pre-processor for parsing the ancillary data to determine characteristics of the individual images prior to storing the encoded digital packetized data. The system also includes a multiplexer for filtering the encoded digital packetized data based on the determined characteristics to identify particular images of the image sequence for storage in a memory and for excluding other images of the sequence from storage.

Digital video picture and ancillary data processing and storage

In an MPEG compatible image signal processor an MPEG data stream is decoded, decompressed and recompressed before blocks of image pixel values are stored in memory. The recompression system evaluates block data to determine the range and minimum pixel values for a given image block of pixels values. These values are encoded, and the encoded representations are stored in a parameter field with the quantized data block to facilitate data reconstruction. Encoding occurs by fitting the actual range and minimum values to a predetermined set of values. Each selected predetermined value is then encoded as a three-bit index in the parameter field. Storing the encoded values with the quantized data facilitates reconstruction with minimal error. Also, encoding the values preserves memory for the quantized data.

Overhead data processor in a memory efficient image processing system

An apparatus for pre-processing of a digital video data stream including luminance and chrominance pixel data, the apparatus comprising a plurality of pre-processing units including a horizontal filter unit and a vertical filter unit. The horizontal filter unit is located at an input side and the vertical filter unit is located at an output side of the preprocessing apparatus and wherein all read/write memory for storing data outputted from or inputted to the plurality of pre-processing units is contained in a single memory block.

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Indianapolis, IN, United States of America

Barth Alan Canfield