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Bart Markus

Lars Samuelson

Jonas Ohlsson

Kristian Storm

Rafal Ciechonski

A semiconductor device having a planar III-N semiconductor layer includes a substrate including a wafer and a buffer layer of a buffer material different from a material of the wafer, the buffer layer having a growth surface, an array of nanostructures epitaxially grown from the growth surface, a continuous planar layer formed by coalescence of upper parts of the nanostructures at an elevated temperature T, where the number of lattice cells spanning a center distance between adjacent nanostructures are different at the growth surface and at the coalesced planar layer, and a growth layer epitaxially grown on the planar layer.

Semiconductor device having a planar III-N semiconductor layer and fabrication method

A semiconductor device having a planar III-N semiconductor layer, comprising a substrate comprising a wafer () and a buffer layer (), of a buffer material different from a material of the wafer, the buffer layer having a growth surface (); an array of nano structures () epitaxially grown from the growth surface; a continuous planar layer () formed by coalescence of upper parts of the nano structures at an elevated temperature T, wherein the number of lattice cells spanning a center distance between adjacent nano structures are different at the growth surface and at the coalesced planar layer; a growth layer (), epitaxially grown on the planar layer ().

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Bart Markus