Sundstrand Corporation

Hamilton Sundstrand Corporation

Barry T Drager

Stephen R Jones

Francis C Belisle

Jef William Good

Abdul Rashid

Graham T Fordyce

Kenneth C Kramer

Chad Lukan

David Hatten

Kyle Elmer

Walter Fry

Joe Foster

George E Wulf, Jr

Steven M Quirk

Kenneth Kramer

Jr George E Wulf

A direct current (DC) overvoltage monitoring and protection device includes an overvoltage sensor operably connected to an electrical power input line. The overvoltage sensor is configured to change state upon detection of a voltage over a preselected threshold. An overvoltage relay is operably connected to the overvoltage sensor. The overvoltage relay includes one or more relay switches configured to move between a first position and a second position when the voltage over the preselected threshold is detected. An independent relay power source is operably connected to the overvoltage relay to provide electrical power to the overvoltage relay, separate from the electrical power being monitored via the electrical power input line.

Direct current over voltage monitoring and protection

Apparatus for detecting an operating condition of a machine synchronizes sampling instants with the machine condition so that high reliability data are obtained. More particularly, an indication of the operating condition of a rotor of the machine is developed at each sampling instant. The operating condition may be, for example, the position of the rotor, in which case estimates of the rotor position and rotor velocity at each of the sampling instants are developed. Sampling signals are then derived from the rotor position and velocity estimates to synchronize the sampling instants to the rotor position.

Synchronous sampling circuit for a sensorless switching reluctance machine system

A sensorless control for operating an inverter coupled to a switched reluctance machine includes an instantaneous position generation circuit that develops a signal for controlling commutation of the switched reluctance machine. The instantaneous position generation circuit includes a digitally controlled counter which provides a direct interface between a position estimation circuit and commutation logic for the inverter.

Instantaneous position indicating apparatus for a sensorless switched

A control for operating an inverter coupled to a switched reluctance machine includes a relative angle estimation circuit for estimating rotor angle for a phase in the switched reluctance machine. The relative angle estimation circuit estimates a phase voltage and thereby calculates phase flux linkage to estimate the rotor angle.

Relative angel estimation apparatus for a sensorless switched reluctance

An apparatus for estimating rotor position of a rotating machine having an even number of phase windings selects first and second phase position estimates developed in response to pulses applied to phase windings having associated phase profiles that are displaced at other than 180 electrical degrees and determines a rotor position estimate from the first and second phase position estimates.

Absolute angle estimation apparatus for a sensorless switched reluctance

An estimator initialization circuit for a sensorless switched reluctance machine system pulses phase windings of the machine a certain number of times and derives initial values for an estimator of the system.

Estimator initialization circuit and method for a sensorless switched

This invention relates to a method of testing an n-bit programmable counter. It is desired to test the n-bit programmable counter in fewer than 2.sup.n cycles. Accordingly, a counter value output on the counter is coupled to a variable increment rate input on the counter. Each bit of the counter is reset to a binary 0 initial state. A binary 1 state is loaded into a carry-in bit of the counter and the counter is iteratively doubled, by means of the coupling between the counter value output and the variable increment rate input, until a carry-out bit of the counter assumes the binary 1 state to thereby allow the counter to be fully tested in n+1 iterations. The counter value output and the variable increment rate input are decoupled from the counter when the counter is not being tested. The counter is provided with a parallel load input to allow simultaneous resetting of each bit. Intermediate counter values may be checked to provide a means for localizing errors within the counter.

Growing community of inventors

Rockford, IL, United States of America

Barry T Drager