Ast Research, Inc.

Ast Reasearch, Inc.

Barry Kennedy

Randall S Welch

Thomas W Masters

A system for controlling initialization and self test operations in a multiprocessor system facilitates the use of central processing units based around differing microprocessor types. More specifically, the present invention involves storing configuration information, initialization self-test code, and boot code specific to each processor, memory module, or I/O circuit board in non-executable form in a non-volatile memory, on the respective circuit board, and storing the executable portion of the boot code needed by the initial boot processor in a centrally accessible non-volatile memory. Moreover, the present invention provides a system to automatically transfer default system initialization operations from a default processor to a first alternative processor if the default processor fails, and to automatically transfer initialization operations to a second alternative processor if the first alternative processor fails, and so forth depending upon how many alternative processors are installed in the multiprocessor system.

Booting of multiprocessor system from a boot ROM of narrower width than

A small computer system interface (SCSI) disk array subsystem has removable disk drive units that can be removed while the subsystem has power applied to it and is operational. In order to prevent malfunctions of other disks in the disk array, and in order to prevent rapid fluctuations in the current in the power circuits of the subsystem, the power and the data and control signals are applied to the inserted disk drive unit in a phased sequence. Initially, the ground of the disk drive unit is connected to the ground of the subsystem along with precharge power which connects the power buses of the disk drive unit to the power buses of the subsystem through resistors so that capacitances connected to the power buses of the disk drive unit are charged gradually through the resistors rather than abruptly. Thereafter, power is applied directly from the power buses of the subsystem to the power buses of the disk drive unit. Finally, the control and data signal connections are made between the subsystem and the disk drive unit. This phased sequence of connections between the subsystem and the disk drive unit is accomplished by providing sets of contacts having differing lengths in a connector on the disk drive unit so that some connections are made before other connections.

Live data storage array system having individually removable, and

Distributed multi-processor boot system for booting each processor in

An interrupt controller for use in a computer system capable of utilizing multiple processors provides a system for automatically distributing interrupts among processors installed in the system. More specifically, in the present invention, each processor has a corresponding interrupt controller. In one embodiment, one interrupt controller acts as a master to acknowledge interrupts at the system level and manage the distribution of interrupts, and any other interrupt controllers act as slave interrupt controllers. The master and slave interrupt controllers also provide an interface for a processor to interrupt another processor, to transfer an interrupt to another processor and to interrupt itself under local software control. Finally, the interrupt controllers provide different masking levels that allow a corresponding processor to temporarily mask interrupts assigned to the processor. The different masking levels also allow the interrupt controllers to accept two pending interrupts and then suppress interrupts to prevent losing any subsequent interrupts.

Interrupt controller with automatic distribution of interrupts for a

A method and apparatus for expanding a backplane interconnecting bus provides an architecture in which the width of a data bus can be expanded without new byte select control lines on the backplane bus. In the present invention, data lines and corresponding parity lines are added to the backplane bus, and control signal lines connect devices capable of utilizing the expanded bus capabilities. The control signal lines do not affect the operation of devices which are designed according to the narrower bus width, and therefore, these devices can be installed in the expanded bus backplane along with devices designed to utilize the expanded width data bus.

Method and apparatus for expanding a backplane interconnecting bus in a

A system for controlling daisy-chain testing of removable printed circuit boards installed along a backplane bus facilitates the use of serial testing methods for circuit boards which are designed according to boundary-scan testing standards. The system automatically controls propagation of serial test data from a serial data pattern generator to a removable circuit board and then from circuit board to circuit board as installed consecutively along the backplane bus, and from the last circuit board installed on the bus to a pattern comparator which determines whether the pattern matches an expected pattern to isolate components on the circuit boards which are not functioning properly.

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Santa Ana, CA, United States of America

Barry Kennedy