Trw Limited

Barry H Whalen

George W McIver

James G Peterson

Bruce L Troutman

A memory circuit in which are stored multiple sets of upper and lower limits that are simultaneously compared with a stream of input data words. The data words and the upper and lower limits may be selectively segmented into data fields or dimensions, and match signals are generated if the input data fields fall within the corresponding fields of the upper and lower limits. The match signals may be selectively masked by a window enable register, and the data fields selected by changing a field length control register.

Window-addressable memory circuit

A fast Fourier transform circuit formed on a single chip, including a fast multiplier-accumulator circuit which, in the preferred embodiment, employs a modified form of Booth's algorithm, an adder circuit, a read-only memory for storing FFT twiddle factors, and a random access memory for holding a set of input complex quantities and for receiving intermediate and final results in an in-place FFT operation. In the preferred embodiment, the FFT twiddle factors are stored in Booth's code for greater speed of operation. Control and timing circuitry on the same chip generates control signals and address codes in order to perform a sequence of butterfly computations by repeated use of the multiplier-accumulator and adder circuits, to generate FFT coefficients in the random access memory.

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Rancho Palos Verdes, CA, United States of America

Barry H Whalen