Ilc Data Device Corporation

Circuit Technology Incorporated

Barry E Becker

Stephen Sacks

Cliff Weber

Apparatus for replacing conventional fault isolation resistors includes a terminal coupled to one winding of a transformer whose other winding is coupled across the two-line databus. Enhancement-mode-field-effect transistors have their source and drain electrodes each coupled between one end of the other winding and one of the databus lines and their control electrodes coupled at spaced intervals along the other winding. The winding voltage is zero when a terminal is not transmitting, turning off the field-effect transistors, presenting an open circuit. The parasitic body diodes of the transistors are connected in series and are poled to oppose each other to prevent conduction of signals from the databus. Thus, signals on the databus are not loaded by the terminal's output impedance. When winding voltage exceeds a threshold, one transistor conducts, providing substantially a short-circuit. The parasitic body diode of the remaining transistor also conducts. When the winding voltage reverses, the conductive states of the transistors are reversed. When the databus is coupled to a receiver by a separate transformer, fault isolation resistors protect the receiver path. When the transmitter and receiver use a common path between the databus and the terminal, higher resistance value fault isolation resistors are placed in parallel with each field-effect transistor, reducing reflections in the databus in the event of a fault. The transistors are preferably enhancement-mode MOSEFTs of either the N-channel or P-channel type; although bipolar transistors or insulated gate bipolar transistors may be employed.

Apparatus for databus fault isolation

An integrated circuit device for comparing the state of a large number of inputs (i.e. 'discretes') against any one of a plurality of selectable voltage levels. The compared data is examined in a 3.times.3 matrix format. In a redundant mode, comparators are utilized in a triple-redundant configuration to obtain a consensus on input states, at three successive time intervals, raising a flag when consensus fails. Inputs, whether in a redundant or non-redundant mode are distributed along three different sides of a rectangular-shaped substrate to prevent catastrophic mechanical failures. In the redundant mode, discretes are compared using a voting technique such that when all three levels are the same, an error free status is provided, whereas a two-out-of-three vote is interpreted as correct but with an indication that the discrete being monitored requires further checking. Data, fault and self-test results are made available to the outside world by a serial transmitter and in parallel form by discrete output terminals. Output data is compared with data inputted for further assuring integrity of the device. Output data is selectable in either an eight bit or sixteen bit tri-state port, which is addressable for channel data, status, bounds, mismatch, built-in self-test and major fault information.

Multiple channel discrete to digital interface

A bi-state linear amplifier is provided which, in response to a first state of a control signal, functions as a linear amplifier, and in response to a second state of a control signal, is cut off to define a high output impedance. The amplifier includes a control circuit responsive to relatively low-current control signals for selectively opening and closing the internal amplification circuit of the amplifier.

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Smithtown, NY, United States of America

Barry E Becker