Stmicroelectronics Gmbh

Maxim Integrated Products, Inc.

Decicon, Inc.

Stmicroelectronics S.r.l.

Stmicroelectrontronics, Inc.

Baris Posat

Roberto Alini

Alessandro Venca

Kemal Ozanoglu

Larry Barnes

Vineet Tiwari

Rajesh Kumar Gupta

Gene Svoboda

Roberto Allni

An integrated circuit (IC) includes a first resonator circuit that includes: a first switching device that connects and disconnects a supply voltage to and from a first node; a first inductor that is connected between the first node and a first ground potential; and a second inductor that is connected between the first node and the first ground potential. The IC also includes a second resonator circuit that includes: a third inductor that is inductively coupled to the first inductor across an isolation barrier and that is connected between a second node and a second ground potential; a fourth inductor that is inductively coupled to the second inductor across the isolation barrier and that is connected between the second node and the second ground potential; and a second switching device that connects and disconnects the second node to and from a load. The second ground potential is different than the first ground potential.

Systems and methods for power transfer based on resonance coupling of inductors

A system includes a first galvanic isolator, a second galvanic isolator, a sensor, and a monitoring module. The first galvanic isolator includes a first electrical insulator. The second galvanic isolator is connected in series with the first galvanic isolator and includes a second electrical insulator. The sensor generates a first output signal based on an electrical characteristic of one of the first and second electrical insulators. The monitoring module, based on the first output signal, selectively generates a signal indicative of a failure of at least one of the first and second electrical insulators.

Dual galvanic isolation barriers and monitoring systems and methods

A switching circuit controls the flow of current between its input and output in accordance with the state of a control signal applied to the circuit. When the control signal is in a first state and the voltage applied to the input is higher than the voltage at the output, the circuit provides a low resistance path between its input and output terminals thereby enabling current to flow from the input to the output. When the control signal is in the first state and the voltage at the output is higher than the voltage at the input, the circuit inhibits current flow from the output to the input. When the control signal is in a second state, the circuit is turned off thus inhibiting current flow between the input and the output.

Power switch with reverse current blocking capability

An integrated circuit (IC) includes first and second resonator circuits and an isolation barrier. The first resonator circuit includes first and second inductors, wherein the first resonator circuit is connected to a supply voltage. The second resonator circuit includes third and fourth inductors, wherein the second resonator circuit is matched to the first resonator circuit. The isolation barrier separates the first and second resonator circuits. The first and second inductors are inductively coupled to the third and fourth inductors, respectively, thereby providing for transfer of power from the first resonator circuit across the isolation barrier to the second resonator circuit.

A system includes a transmitter, a receiver, a isolation barrier, and a fuse. The isolation barrier is connected to the transmitter. The fuse is connected between the isolation barrier and the receiver. The isolation barrier prevents current flow from the transmitter to the receiver when a voltage across the isolation barrier is less than a first breakdown voltage. The isolation barrier short circuits when the voltage across the isolation barrier is greater than or equal to the first breakdown voltage. The fuse opens when the isolation barrier short circuits. When open, the fuse has a second breakdown voltage that is greater than the first breakdown voltage.

Failsafe galvanic isolation barrier

An H-bridge driver for a disk drive system includes first and second high side switched legs and first and second low side switched legs. An inductor head for writing data to and reading data from a magnetic media is connected to form a center of the H-bridge. The system includes a voltage regulator circuit that generates a common mode regulated voltage. First and second high side logic circuits, which selectively control operation of the first and second high side switched legs, are coupled between a high reference voltage and the common mode regulated voltage. First and second low side logic circuits, which control the first and second low side switched legs, are coupled between the common mode regulated voltage and ground.

Disk drive write driver and associated control logic circuitry

An amplifying circuit and method are disclosed for amplifying electrical signals, such as electrical signals generated by the read head of a disk drive. The circuit includes a pair of cross-coupled differential amplifier circuits. Each differential amplifier circuit is asymmetric, including two input transistors of different transistor types. For instance, a first of the two input transistors of each differential amplifier circuit may be a bipolar transistor and a second of the two input transistors may be a field effect transistor. By utilizing asymmetric differential amplifier circuits, a relatively wider operating frequency range is obtained.

Preamplifier circuit and method for a disk drive device

A write driver for driving a write current through a write head connected to the write head by an interconnect or flexible transmission line. The write driver includes a circuit matching an output impedance of the write driver to the odd characteristic impedance of the interconnect and includes a current source generating a current output to the write head. The write driver provides a current amplification effect as the output current is half the write current driven through the write coil. The impedance matching circuit includes an output resistor with a resistance equal to the odd characteristic impedance of the interconnect. The write driver includes a voltage source that operates to maintain a voltage drop of zero on the output resistor during the initial period of twice the transmission delay of the interconnect.

Write driver with power optimization and interconnect impedance matching

A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a pair of current sources, such as MOS transistors, connected to the input node of a single capacitor. During the overshoot duration, the current sources selectively operate at saturation to generate a pulsed current with an amplitude of half the load current. The recharge of the capacitor is done with the load current.

Write driver with improved boosting circuit and interconnect impedance matching

A preamplifier for correcting for thermal asperity transients in disk drives using magneto resistive read heads. The preamplifier has an input gain stage receiving a signal from the read head and an output buffer outputting a reader output to a read channel that is filtered of thermal asperity transients by a high pass filter positioned between the input gain stage and the output buffer. The high pass filter is voltage controlled based on an input control signal from a filter controller. The filter controller uses a low pass filter functioning as a peak detector to detect peaks in either the input or output voltage of the high pass filter. The low pass filter output is applied to a non-linear function generator generating the control signal for the high pass filter based on an increasing function of the absolute value of the low pass filter output.

Read head preamplifier with thermal asperity transient control

A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a current source, such as a MOS transistor, connected to the input node of a capacitor. During the overshoot duration, the current source operates at saturation to generate a pulsed current with an amplitude of half the load current. The circuit includes another transistor in series with the current generator between the capacitor and the driver output. A forward bias diode is connected between the capacitor output node and high voltage reference and enters reverse bias during overshoot duration swinging the driver output voltage above supply voltage.

Disk drive write driver with boosting circuit to improve output voltage swing

A circuit and method are disclosed for relatively rapidly causing the current flowing through a write head to transition between steady states without generating an appreciable amount of capacitively-coupled noise. Embodiments of the present invention generally provide drive voltage signals to the write head that have no common mode voltage levels during transitions between steady state current levels in the write head. In other words, the drive voltage signals applied to the write head are substantially entirely differential during write head current transitions. In an exemplary embodiment of the present invention, a driver circuit includes switching circuitry connected between the terminals of the write head and reference voltage supplies, such as positive and negative voltage supplies. The driver circuit further includes timing circuitry that generates control signals for controlling the switching circuitry.

Write head driver circuit and method for writing to a memory disk

A method and system are disclosed for generating descriptions of circuits representative of the behavior of dynamic systems. A state space model representing a dynamic system may be used to generate an electronic circuit equivalent having operating characteristics equivalent to the operating characteristics of the dynamic system. The electronic circuit equivalent may be then described as a SPICE circuit description which is simulated to determine the time and frequency domain characteristics of the dynamic system.

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San Jose, CA, United States of America

Baris Posat