Stmicroelectronics S.r.l.

Barbaro Marano

Giuseppe Palmisano

Egidio Ragonese

Mario Chiricosta

Nunzio Spina

Crocifisso Marco Antonio Renna

Antonino Scuderi

Carlo Magro

A cell includes a first pair and a second pair of MOS transistors. Each of the first pair and second pair of MOS transistors have drain electrodes coupled to a respective common input node. Each of the first pair and second pair of MOS transistors includes a diode-connected MOS transistor and a latched MOS transistor. The latched MOS transistors of the first pair and second pair of MOS transistors have cross-coupled gate and drain electrodes. Source electrodes of the diode connected MOS transistors from the first pair and second pair of MOS transistors are coupled to a first current output common node to output a current to a first current collecting circuit. Source electrodes of the latched MOS transistors of the first pair and second pair of MOS transistors are coupled to a second current output common node to output a current to a second current collecting circuit.

Piecewise linear function generating electronic circuit, corresponding generator, amplifier, method and computer program product

A galvanic-isolated coupling of circuit portions is accomplished on the basis of a stacked chip configuration. The semiconductor chips thus can be fabricated on the basis of any appropriate process technology, thereby incorporating one or more coupling elements, such as primary or secondary coils of a micro transformer, wherein the final characteristics of the micro transformer are adjusted during the wafer bond process.

Microstructure device comprising a face to face electromagnetic near field coupling between stacked device portions and method of forming the device

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Acireale, Italy

Barbaro Marano