Intel Corporation

Bapi Vinnakota

Matthew James Adiletta

Saurin Shah

Sameer Nanavati

Sunil B Chaudhari

Corey Gee

Nicholas E Duresky

A method is used to authenticate a wireless device for secure operation on a wireless local area network, the wireless local area network including a controller. The method to include broadcasting from the controller a configuration message based on the controller being physically switched to a configuration mode. The method to also include accepting at the controller a response from the wireless device, the response accepted based on receiving the response within a fixed time period following the broadcasting of the configuration message, the accepted response including information encrypted using the controller's public key. A user message is obtained, the user message entered by the user at the controller and maintained at the controller. The wireless device is authenticated based on whether the response including the encrypted information, when decrypted with a private key associated with the controller's public key, matches the user message.

Secure wireless network

A method and device to copy data fields from one or more source packets to one or more result packets. In a SET function, adjacent data fields in a source packet is copied to respective destination data fields in a result packet governed by a field locator packet. In an ESET function, data fields in respective source packets are copied to adjacent data fields in a result packet governed by a field locator packet. In an EXTRACT function, data fields in a source packet are copied to adjacent data fields in a result packet governed by a field locator packet. In a SCATTER function, adjacent data fields in a source packet are copied to data fields in respective result packets governed by a field locator packet.

Circuit to extract nonadjacent bits from data packets

According to one embodiment of the invention, a method is provided in which memory requests from a first component and a second component are received. The memory requests are issued by the first component and the second component to access one or more memory devices via a memory controller. The memory requests received from the first component are accumulated in a first queue and the memory requests received from the second component are accumulated in a second queue, respectively. The memory requests accumulated in the first queue are sent to the memory controller for processing as a block of memory requests. The memory requests accumulated in the second queue are sent to the memory controller for processing as a block of memory requests.

Apparatus, method, and system for reducing latency of memory devices

A method, apparatus, and system for communicating between a digital signal processor (DSP) and a packet processor.

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Fremont, CA, United States of America

Bapi Vinnakota