Taiwan Semiconductor Manufacturing Comp. Ltd.

Intel Corporation

Carl Zeiss Smt Gmbh

Baohua Niu

Ji-Feng Ying

Jhong-Sheng Wang

Lien-Yao Tsai

David Hung-I Su

Neena Avinash Gilda

Chi-Yuan Shih

Yi-Chuan Teng

Kai-Fung Chang

Theodore R Lundquist

Patrick Pardy

Chia-Nan Ke

Chi-Chun Lin

Da-Shou Chen

David L Budka

Mitchell L Sacks

An apparatus for measuring a magnetic field strength is provided. The apparatus includes a stage on which a sample to be measured is placed, a cantilever having a tip, an optical system having a light source and a light receiver, and a microwave power source. The tip is a diamond tip having a nitrogen vacancy defect. The optical system is configured such that excitation light from the light source is focused at the diamond tip. The cantilever is configured as a coaxial microwave antenna through which microwaves from the microwave power source are supplied to the diamond tip.

Method and apparatus for measuring magnetic field strength

A method of manufacturing an array of magnetic random access memory cells includes writing to a magnetic random access memory cell. The writing to a memory cell includes determining an optimum write current for the array of memory cells, and applying the optimum write current to a first memory cell in the array. A first read current is applied to the first memory cell to determine whether a magnetic orientation of the first memory cell has changed in response to applying the optimum write current. A second write current is applied to the first memory cell when the magnetic orientation of the first memory cell has not changed. The second write current is different from the optimum write current. A second read current is applied to the first memory cell to determine whether the magnetic orientation of the first memory cell changed in response to applying the second write current.

Method for writing to magnetic random access memory

A method of performing metrology analysis of a thin film includes coupling a radiation into an optical element disposed adjacent to a surface of the thin film. The radiation is coupled such that the radiation is totally internally reflected at an interface between the optical element and the thin film. An evanescent radiation generated at the interface penetrates the thin film. The method furthers include analyzing the evanescent radiation scattered by the thin film to obtain properties of the thin film.

Apparatus and method for metrology

A memory cell of a magnetic random access memory includes multiple layers disposed between a first metal layer and a second metal layer. At least one of the multiple layers include one selected from the group consisting of an iridium layer, a bilayer structure of an iridium layer and an iridium oxide layer, an iridium-titanium nitride layer, a bilayer structure of an iridium layer and a tantalum layer, and a binary alloy layer of iridium and tantalum.

Magnetic random access memory

A semiconductor device is provided. The semiconductor device has a semiconductor layer including a source/drain region, a first magnetic layer over the semiconductor layer, and a first dielectric layer over the source/drain region and adjacent the first magnetic layer. The semiconductor device has a metal structure extending through the first dielectric layer, a second magnetic layer over the metal structure, and a second dielectric layer over the first magnetic layer and adjacent the first dielectric layer.

Semiconductor device having magnetic tunnel junction (MTJ) stack

A method for analyzing an integrated circuit includes: applying an electric test pattern to the IC; delivering a stream of primary electrons to a back side of the IC on an active region to a transistor of interest, the active region including active structures such as transistors of the IC; detecting light resulting from cathodoluminescence initiated by secondary electrons in the IC; and analyzing the detected light regarding a correlation with the electric test pattern applied to the IC. A system for analyzing an IC is provided.

Method and system for testing an integrated circuit

The present disclosure provides a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device includes the following operations. An intermediate layer is formed in the semiconductor device. A field is applied to the intermediate layer, wherein the field source does not contact the semiconductor device. The polarity of the intermediate layer is changed by the field to form a desired dipole orientation in the intermediate layer.

Method and apparatus for manufacturing semiconductor device

A magnetic detection circuit for a magnetic random access memory (MRAM) is provided. The magnetic detection circuit includes a sensing array and a controller. The sensing array includes a plurality of sensing cells, and each of plurality of sensing cells includes a first magnetic tunnel junction (MTJ) device. The controller is configured to periodically write and read the sensing cells to obtain a difference between first data written to the sensing cells and second data read from the sensing cells. When the difference between the first data and the second data is greater than a threshold value, the controller is configured to stop a write operation of a plurality of memory cells of the MRAM until the difference between the first data and the second data is less than the threshold value.

Magnetic detection circuit, MRAM and operation method thereof

A memory test system is disclosed that includes a memory integrated circuit (IC) and a memory functional tester. The memory IC includes a plurality of memory banks, where each memory bank includes a plurality of memory cells. The memory functional tester includes an adjustable voltage generator circuit, a read current measurement circuit, and a controller. The memory functional tester performs a write/read functional test on the memory bank over a number of write control voltages to determine a preferred write control voltage, where the preferred write control voltage is designated for use during subsequent write operations to the memory bank during an operational mode.

Apparatus for memory device testing and field applications

An electronic device includes a capacitor and a passivation layer covering the capacitor. The capacitor includes a first electrode, a dielectric layer disposed over the first electrode and a second electrode disposed over the dielectric layer. An area of the first electrode is greater than an area of the dielectric layer, and the area of the dielectric layer is greater than an area of the second electrode so that a side of the capacitor has a multi-step structure.

Electronic device including a capacitor

The present disclosure provides a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device includes the following operations. An intermediate layer is formed in the semiconductor device. A voltage is applied to the intermediate layer. A unit cell of the intermediate layer is stretched or compressed by the voltage. The polarity of the intermediate layer is changed by the voltage.

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Hsinchu, Taiwan

Baohua Niu