Cisco Technology, Inc.

Bangalore Priyadarshan

Jaushin Lee

William Norman Eatherton

Fusun Ertemalp

Priyank Ramesh Warkhede

Dileep Kumar Devireddy

Venkateshwar Rao Pullela

Bhushan Mangesh Kanekar

Hugh Holbrook

Dipankar Bhattacharya

François Gautier-Le Boulch

A source-synchronous parallel interface divides a wide data bus into clock-groups including a sub-group of the data lines and a clock line carrying a copy of the transmit clock. The traces in a clock-group are located physically close together to minimize skew between the signals carried on the traces of the clock-group. Deskew logic on the receiver compensates for skew between received clock-group signals.

Aligning data in a wide, high-speed, source synchronous parallel link

Methods and apparatus are disclosed for performing lookup operations using associative memories, including, but not limited to modifying search keys within an associative memory based on modification mappings, forcing a no-hit condition in response to a highest-priority matching entry including a force no-hit indication, selecting among various sets or banks of associative memory entries in determining a lookup result, and detecting and propagating error conditions. In one implementation, each block retrieves a modification mapping from a local memory and modifies a received search key based on the mapping and received modification data. In one implementation, each of the associative memory entries includes a field for indicating that a successful match on the entry should or should not force a no-hit result. In one implementation, an indication of which associative memory blocks or sets of entries to use in a particular lookup operation is retrieved from a memory.

Performing lookup operations on associative memory entries

PERFORMING LOOKUP OPERATIONS USING ASSOCIATIVE MEMORIES OPTIONALLY INCLUDING MODIFYING A SEARCH KEY IN GENERATING A LOOKUP WORD AND POSSIBLY FORCING A NO-HIT INDICATION IN RESPONSE TO MATCHING A PARTICULAR ENTRY

Methods and apparatus are disclosed for performing lookup operations using associative memories, including, but not limited to modifying search keys within an associative memory based on modification mappings, forcing a no hit condition in response to a highest priority matching entry including a force no hit indication, selecting among various blocks or sets of associative memory entries in determining a lookup result, and detecting and propagating error conditions. In one implementation, indications of which associative memory blocks to use and/or enable in a particular lookup operation are retrieved from one or more memories, such as that based on received a profile ID. In one implementation, which may or may not be in a cascaded configuration, one or more identified or received error conditions are propagated in such a manner as to identify a source of each error condition.

Performing lookup operations using associative memories optionally including selectively determining which associative memory blocks to use in identifying a result and possibly propagating error indications

Methods and apparatus are disclosed for, inter alia, managing idle time and performing lookup operations to adapt to refresh requirements and/or operational rates of the particular associative memory or other devices used to implement the system. A system typically a controller coupled to a circuit including includes multiple associative memories. The controller receives performance information from at least one of the associative memories and generates idle time corresponding to the performance information. This performance information may include an actual refresh requirement for each of the associate memories or the worst-case requirement of one of the associative memories, so that the controller can intermittently provide the actual refresh cycles required, if any, by a particular implementation. This performance information may indicate for some or all instructions the actual time required by a particular instruction, so that the controller can operate based on the actual time required, rather than inefficiently operating on a worst-case time defined in a specification or data sheet.

Managing idle time and performing lookup operations to adapt to refresh requirements or operational rates of the particular associative memory or other devices used to implement the system

Growing community of inventors

Fremont, CA, United States of America

Bangalore Priyadarshan