Applied Materials, Inc.

Bang C Nguyen

Stuardo A Robles

Ellie Y Yieh

Peter W Lee

Li-Qun Xia

Paul Edward Gee

Visweswaren Sivaramakrishnan

Thanh Ngoc Pham

Ruby Liao

Shankar Vankataranan

Gayathri Rao

Mei Yin Chang

Gary Fong

Peter Wai-Man Lee

Francimar Campana

Maria Galiano

Dana Tribula

Visweswaren Sivaramakrishnam

Xin Zhang

Gary L Fong

Vicente M Lim

Shankar Venkataranan

Kathleen Russell

Vicente Lam

A method and apparatus are disclosed for forming thin polymer layers on semiconductor substrates. In one embodiment, the method and apparatus include the vaporization of stable di-pxylylene, the pyrolytic conversion of such gaseous dimer material into reactive monomers, and the optional blending of the resulting gaseous p-xylylene monomers with one or more polymerizable materials in gaseous form capable of copolymerizing with the p-xylylene monomers to form a low dielectric constant polymerized parylene material. An apparatus is also disclosed which provides for the distribution of the polymerizable gases into the deposition chamber, for cooling the substrate down to a temperature at which the gases will condense to form a polymerized dielectric material, for heating the walls of the deposition chamber to inhibit formation and accumulation of polymerized residues thereon, and for recapturing unreacted monomeric vapors exiting the deposition chamber. An apparatus is further provided downstream of the deposition chamber to control both the flow rate or residence time of the reactive monomer in the deposition chamber as well as to control the pressure of the deposition chamber. Provision is further made for an electrical bias to permit the apparatus to function as a plasma etch chamber, for in situ plasma cleaning of the chamber between depositions, for enhancing cracking of polymerizable precursor material, for heating the walls of the chamber and for providing heat sufficient to prevent polymerization in the gas phase.

Method and apparatus for forming a thin polymer layer on an integrated circuit structure

The present invention relates to the deposition of dielectric layers, and more specifically to a method and apparatus for forming dielectric layers such as borophosphosilicate glass (BPSG) having improved film uniformity, higher deposition rate, superior gap fill/reflow capability, and smoother surface morphology. The method forms a dielectric layer with a process using helium carrier gas that produces substantially less downstream residue than conventional methods and apparatus, thereby reducing the need for chamber cleaning and increasing throughput of processed wafers. The present invention utilizes helium instead of nitrogen as carrier gas in a process for forming a dielectric layer such as BPSG to provide various unexpected benefits. According to one aspect, the present invention forms a dielectric film on a substrate, and prolongs a period between chamber cleanings in a system by using helium which produces substantially less downstream and upstream residue than a process using nitrogen. The method includes introducing a process gas containing silicon, oxygen, and first dopant atoms into the chamber; using helium as the carrier gas in the system; and processing more substrates between cleanings than a process using nitrogen as carrier gas. A further aspect of the invention includes annealing the dielectric films formed on the substrates at a lower temperature than required by the process using nitrogen as carrier gas.

Method and apparatus for forming a dielectric film using helium as a carrier gas

A method and apparatus for reducing surface sensitivity of a TEOS/O,SACVD silicon oxide layer, formed over a substrate, that deposits a ramp layer while ramping pressure to a target deposition pressure and deposits an SACVD layer over the ramp layer. In one embodiment, the flow of ozone is stopped during the pressure ramp-up to control the thickness of the ramp layer.

Method and apparatus for elimination of TEOS/ozone silicon oxide surface sensitivity

A method and apparatus for reducing surface sensitivity of a TEOS/O.sub.3 SACVD silicon oxide layer, formed over a substrate, that deposits a ramp layer while ramping pressure to a target deposition pressure and deposits an SACVD layer over the ramp layer. In one embodiment, the flow of ozone is stopped during the pressure ramp-up to control the thickness of the ramp layer.

Method for elimination of TEOS/ozone silicon oxide surface sensitivity

A method and apparatus for forming a halogen-doped silicon oxide film, preferably a fluorinated silicon glass (FSG) film, having compressive stress less than about -5.times.10.sup.8 dynes/cm.sup.2. In a specific embodiment, the FSG film is formed by a sub-atmospheric CVD thermal process at a pressure of between about 60-650 torr. The relatively thin film, besides having a low dielectric constant and good gap fill capability, has low compressive stress, and is particularly suitable for use as an intermetal (IMD) layer.

Method for forming low compressive stress fluorinated ozone/TEOS oxide

The present invention provides systems, methods and apparatus for high temperature (at least about 500-800.degree. C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce total processing time and to ensure high quality processing for high aspect ratio devices. Performing multiple process steps in the same chamber also increases the control of the process parameters and reduces device damage. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.

Methods and apparatus for forming ultra-shallow doped regions using

An improved method of in-situ cleaning a throttle valve in a CVD device and exhaust flow control apparatus for facilitating such cleaning. The throttle valve is repositioned such that it is juxtaposed in close proximity to the exhaust gas port of the reaction chamber. A plasma is then ignited in a cleaning gas mixture of nitrogen trifluoride, hexafluoroethane and oxygen.

Method for cleaning a throttle valve

A method and apparatus are disclosed for forming thin polymer layers on semiconductor substrates. In one embodiment, the method and apparatus include the sublimation of stable dimer parylene material, the pyrolytic conversion of such gaseous dimer material into reactive monomers, and for the optional blending of the resulting gaseous parylene monomers with one or more polymerizable materials in gaseous form capable of copolymerizing with the parylene monomers to form a low dielectric constant polymerized parylene material. An apparatus is also disclosed which provides for the distribution of the polymerizable gases into the deposition chamber, for cooling the substrate down to a temperature at which the gases will condense to form a polymerized dielectric material, for heating the walls of the deposition chamber to inhibit formation and accumulation of polymerized residues thereon, and for recapturing unreacted monomeric vapors exiting the deposition chamber. An apparatus is further provided downstream of the deposition chamber to control both the flow rate or residence time of the reactive monomer in the deposition chamber as well as to control the pressure of the deposition chamber. Provision is further made for an electrical bias to permit the apparatus to function as a plasma etch chamber, for in situ plasma cleaning of the chamber between depositions, for enhancing cracking of polymerizable precursor material, for heating the walls of the chamber and for providing heat sufficient to prevent polymerization in the gas phase.

Method and apparatus for forming a thin polymer layer on an integrated

Method and apparatus for cleaning a throttle valve

A method of and apparatus for depositing a silicon oxide layer onto a wafer or substrate is provided. The present method includes introducing into a processing chamber a process gas including silicon, oxygen, boron, phosphorus and germanium to form a germanium doped BPSG oxide layer having a reflow temperature of less than 800.degree. C. Preferred embodiments of the present method are performed in either a subatmospheric CVD or a plasma enhanced CVD processing apparatus.

Chemical vapor deposition reactor system and integrated circuit

A process for depositing void-free silicon oxide layers over stepped topography comprising depositing a first silicon oxide seed layer which is doped with nitrogen from a plasma of tetraethoxysilane and a nitrogen-containing gas, and depositing thereover a silicon oxide layer from a mixture of tetraethoxysilane, ozone and oxygen at low temperatures to produce a silicon oxide layer having improved properties.

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Fremont, CA, United States of America

Bang C Nguyen