Broadcom Corporation

Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies International Sales Pte. Limited

Balaji Narasimham

Karthik Chandrasekharan

Gregory Djaja

Systems, circuits, and chips for hardening a latch/flip-flop circuit against soft errors caused by alpha and neutron radiation are provided. As an example, a latch/flip-flop circuit including a switch to selectively couple a capacitor to first and second storage nodes during a hold phase is disclosed.

Clocked miller latch design for improved soft error rate

A circuit for steering charges generated from ionization radiation away from a latch includes charge steering transistors operating in strong inversion. The charge steering transistors are electrically coupled to other transistors in stacked inverters within the latch. During normal operation, the charge steering transistors are turned on when the other transistors being coupled to are turned off. The charge steering transistors may reduce the negative impact of ionization radiation on the operation of the latch.

Charge steering latch for low soft error rate

A hysteresis-based logic element design for improved soft error rate with low area/performance overhead. In one embodiment, a hysteresis inverter block including one or more pairs of inverters can be coupled to a logic element to adjust a switching threshold of the logic element.

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Aliso Viejo, CA, United States of America

Balaji Narasimham