Ordos Yuansheng Optoelectronics Co., Ltd.

Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Bailing Liu

Peng Liu

Zhen Wang

Fuqiang Li

Jun Fan

Han Zhang

Mei Li

Jianjun Zhang

Yun Qiao

Zhengkui Wang

Yusheng Liu

Xin Wang

Jian Qiao Sun

Yu Wang

Zhichong Wang

Fei Huang

Jing Feng

Yan Fang

Jian Sun

Xinglong Luan

Lele Cong

Haifeng Bi

Yufeng Bao

Shun Zhao

Lifeng Chen

Wenke Li

An array substrate, a method of manufacturing an array substrate, a display panel, and an electronic device are provided. The array substrate includes a display area and a peripheral area; the display area includes a pixel region, the pixel region includes a first thin film transistor, and the first thin film transistor includes a first active layer; the peripheral area includes a second thin film transistor, and the second thin film transistor includes a second active layer; and the first active layer includes a material of oxide semiconductor, and the second active layer includes a material of poly-silicon semiconductor.

Array substrate and manufacturing method thereof, display panel and electronic device

A gate driving unit, a gate driving method, a gate driving circuit, a display panel and a display device are provided. The gate driving unit includes a start terminal, a first gate driving signal output terminal, a second gate driving signal output terminal, a pull-up control node control circuit, a pull-up node control circuit, configured to control a potential of a first pull-up node and a potential of a second pull-up node based on the potential of the pull-up control node, a first gate driving signal output circuit, a second gate driving signal output circuit, and a pull-down node control circuit, configured to control and maintain the potential of the pull-down node under the control of a third clock signal and a fourth clock signal, and control to reset the potential of the pull-down node under the control of the potential of the pull-up control node.

Gate driving unit including four clock signals, gate driving method, gate driving circuit, display panel and display device

An image processing method provided by embodiments of the present disclosure includes acquiring, two adjacent frames of original images from a video image data stream; extracting a feature element that produces smear from the two adjacent frames of the original images; generating a reconstructed image frame that does not comprise the feature element by using the two adjacent frames of the original images and the feature element; and inserting the reconstructed image frame between the two adjacent frames of the original images.

Image processing method and apparatus, display device, and computer readable storage medium

A shift register includes a first input sub-circuit configured to transfer a first input signal at a first input terminal to a first node in response to a first scan signal at a first scan terminal being active, a first level control sub-circuit configured to transfer a first power supply voltage at a first power supply terminal to a first output control node and a second output control node in response to the first node being at an active potential, and an output sub-circuit configured to transfer a first clock signal at a first clock terminal to a first output in response to the first output control node being at an active potential, and to transfer a second clock signal at a second clock terminal to a second output terminal in response to the second output control node being at an active potential.

Shift register, driving method thereof, gate driving circuit, and display device

A shift register includes a first input sub-circuit, a pull-up control sub-circuit, and a pull-down control sub-circuit. The first input sub-circuit is configured to transmit a voltage from the first signal terminal to the first node under control of the first voltage terminal. The pull-up control sub-circuit is configured to be in a turn-on or turn-off state under control of the first node. The pull-down control sub-circuit is configured to transmit a voltage from the third voltage terminal to the pull-down node under control of the first node, transmit the voltage from the third voltage terminal to the pull-down node under control of the signal output terminal, and transmit a voltage from the first clock signal terminal to the pull-down node under control of the first clock signal terminal.

Shift register, gate driving circuit and driving method, and display apparatus

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Beijing, China

Bailing Liu