Qualcomm Incorporated

Space Exploration Technologies Corp.

Babak Vakili-Amini

Ali Sajjadi

Masoud Kahrizi

Alireza Mehrnia

Bagher Afshar

Bernd Pregardier

Alex Ahmad Mirzaei

Behzad Nourani

Soheil Golara

In an embodiment, an apparatus includes a first digital beamformer (DBF) associated with a first subset of antennas of a phased array antenna, the first DBF including a transmit section associated with transmission of a first signal at a first frequency in a transmit mode and a receive section associated with receiving of a second signal at a second frequency in a receive mode, the second frequency being different from the first frequency. The apparatus includes a second DBF associated with a second subset of antennas of the phased array antenna. The first and second DBFs are configured to receive a local oscillator signal having the first frequency from a common local oscillator in the transmit mode and receive the local oscillator signal having the second frequency from the common local oscillator in the receive mode.

Half duplex mode digital beamforming device

In an embodiment, a device is included in a communications system, the device including a plurality of antenna elements configured in a phased array antenna; a plurality of integrated circuit (IC) chips, wherein each IC chip of the plurality of IC chips is associated with a respective subset of antenna elements of the plurality of antenna elements, and wherein, for each IC chip of the plurality of IC chips, the associated subset of antenna elements is used for transmitting and receiving radio frequency (RF) signals by the IC chip; and a local oscillator configured to generate a common local oscillator signal and provide the common local oscillator signal to each IC chip of the plurality of IC chips.

Disclosed is a low dropout (LDO) voltage regulator that includes a differential amplifier configured to amplify a differential between a reference voltage and a regulated output voltage, a pass transistor coupled to the differential amplifier and driven by an output of the differential amplifier, a compensation capacitor coupled to an output node of the differential amplifier, and an auxiliary amplifier, wherein an output node of the auxiliary amplifier is coupled to the compensation capacitor, and wherein an input node of the auxiliary amplifier is coupled to the pass transistor.

Compensated low dropout with high power supply rejection ratio and short circuit protection

Certain aspects of the present disclosure provide apparatus for producing an output signal having a duty cycle of 50% and a frequency that is one third that of an input signal. One example frequency dividing circuit for producing such an output signal generally includes first and second flip-flops; first, second, and third logic circuits, each configured to function equivalently to a logic OR gate; and an internal frequency dividing circuit configured to generate an output waveform having a frequency that is one half that of an input waveform.

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Irvine, CA, United States of America

Babak Vakili-Amini