National Semiconductor Corporation

Babak Matinpour

Vijaya G Ceekala

Yongseon Koh

Ramsin Michael Ziazadeh

An analog device under test circuit and a built-in test circuit for testing an AC transfer characteristic of the analog device under test are fabricated on an integrated circuit. The built-in test circuit includes an amplitude detector that detects the amplitude of the output signal of the analog device under test. The test time is reduced by sampling in real-time the DC value corresponding to the amplitude of the analog device under test. An additional reduction in the test time is achieved by using comparators with upper and lower limit reference signals and a pass-fail logic test.

Built-in test circuit for testing AC transfer characteristic of high-speed analog circuit

An integrated circuit comprises a pin coupled to receive signals from outside the integrated circuit and an input network. The input network equalizes incoming signals by attenuating lower frequency input signals more than higher frequency input signals received at the pin. The input network is configured to generate a DC bias voltage at an output of the input network in response to an AC coupled input signal or a DC coupled input signal received at the pin with a wide common-mode range.

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Sunnyvale, CA, United States of America

Babak Matinpour