Cirrus Logic Inc.

Silicon Laboratories Inc.

Axel Thomsen

John L Melanson

Eric Jerome King

Dan Bernard Kasha

Wai Laing Lee

Thomas H Hoff

Xiaodong Wang

Jinwen Xiao

Lei Wang

Anthony Stephen Doy

Yunteng Huang

Alan Lee Westwick

Jerrell P Hein

Ligang Zhang

Pavel Konecny

Shouli Yan

Murari L Kejariwal

Ka Yin Leung

Zhiwei Dong

Kenneth Wilson Fernald

Clayton H Daigle

Aryesh Amar

Arashk Norouzpourshirazi

Timothy Joseph Dupuis

John M Khoury

Douglas F Pastorello

Edwin De Angel

Ravi Kishore Kummaraguntla

Paul Wilson

Sherry Xiaohong Wu

Jerome E Johnston

Praveen Kallam

Shahram Tadayon

Lizhong Sun

Prasad Ammisetti

Aleksey Sergeyevich Khenkin

John Christopher Tucker

Dazhi Wei

Ammisetti Prasad

Paul Zavalney

Ricky Setiawan

David M Pietruszynski

Rex Wong Tak Ying

Akhil K Garlapati

Vivek Saraf

Kevin G Smith

Derrick Chunkai Wei

Gang Yuan

Richard J Juhn

Jean Pierre Lasseuguette

Imranul Islam

William W K Tang

Doug Frey

Tejasvi Das

Eric J Swanson

Ramin Zanbaghi

Richard Ian Laming

Donald E Alfano

Mohamed M Elsayed

Tsjerk Hans Hoekstra

Bruce Philip Del Signore

Matthew Powell

Scott Willingham

Stephen Timothy Hodapp

Colin Robert Jenkins

Robert Thomas Grisamore

James Thomas Deas

Chao Yang

Ross Crawford Morgan

Steffen Skaug

Karl I Nordling

Marek Sebastian Piechocinski

Zhongda Wang

Qicheng Yu

Malcolm Blyth

Brent Wilson

Christophe J Amadi

Nicholas Montgomery Atkinson

Kartika Prihadi

Subrata Roy

Jeffrey S Batchelor

Mucahit Kozak

Kenneth Alan Berringer

Angus Black

Erik Pankratz

Ronald G Spencer

Sai Chu Wong

Michael Petrowski, Iii

Edwin Angel

Ying Shi

Steven P Proffitt

Sherry Xiao Hong Wu

Pedro Pachuca

Sven Soell

Angel C Abusleme Hoffman

Phil A Callahan

Ahsan Javed

Prisad Ammisetti

An ADC may include an analog front end (AFE) configured to receive an analog input signal and sample the input signal to generate an analog sampled signal comprising a plurality of analog samples and conversion circuitry configured to convert each analog sample to a respective digital sample during a conversion phase. The AFE may include an amplifier configured to receive and buffer the input signal to generate an analog output signal and sampling circuitry configured to sample each of the plurality of analog output samples onto a sampling capacitor during a sampling phase. The AFE may also include precharging circuitry configured to, during the conversion phase, track the analog input signal and store a charge on a precharging capacitor, the charge based on the analog input signal, and during a precharging transfer phase, transfer at least a portion of the charge stored on the precharging capacitor to the sampling capacitor.

Systems and methods for precharging driver circuitry for an analog-to-digital converter

A circuit may include a two-stage feedforward compensated operational transconductance integrated amplifier, and the two-stage feedforward compensated operational transconductance integrated amplifier may include an input terminal, an output terminal, a signal path between the input terminal and the output terminal, the signal path comprising a first signal path gain stage and a second signal path gain stage, and ripple rejection circuitry coupled between the input terminal and an intermediate node of the signal path located between the first signal path gain stage and the second signal path gain stage. The ripple rejection circuitry may include a first ripple rejection circuitry gain stage coupled at its input to the input terminal and coupled at its output to an input terminal of a chopper circuit, a notch filter coupled at its input to an output terminal of the chopper circuit, and a second ripple rejection circuitry gain stage coupled at its input to an output terminal of the notch filter and coupled at its output to the intermediate node.

Operational amplifier for use in coulomb counter circuit

This application relates to methods and apparatus for driving a transducer with switching drivers. A driver circuit has first and second switching drivers for driving the transducer in a bridge-tied-load configuration, each of the switching drivers having a respective output stage for controllably switching the respective driver output node between high and low switching voltages with a controlled duty cycle. Each of switching drivers is operable in a plurality of different driver modes, wherein the switching voltages are different in said different driver modes. A controller controls the driver mode of operation and the duty cycle of the switching drivers based on the input signal. The controller is configured to control the duty cycles of the first and second switching drivers within defined minimum and maximum limits of duty cycles; and to transition between driver modes of operation when the duty cycle of one of the switching drivers reaches a duty cycle limit.

Driver circuitry and operation

A circuit and method for generating a protection voltage includes a pair of voltage-generating circuits that generate voltages from the power supply voltage. The voltages have a differing dependence on the power supply voltage so that a difference between the first voltage and the second voltage changes sign for a particular value of the power supply voltage. The voltages are supplied to a protection voltage generating circuit that includes a pair of amplifiers having inputs that receive a respective one of the voltages and each of the amplifiers provides negative feedback to the other. An output circuit generates the protection voltage according to a maximum or a minimum value among the amplifier outputs, so that the protection voltage is monotonic with respect to variation of the power supply voltage.

Protection voltage generating circuit with monotonic and stable power supply voltage behavior

A method may include, for a signal path comprising a passive antialiasing filter sampled by a switched-capacitor front-end, monitoring a change of a first impedance of a resistor of the passive antialiasing filter responsive to an environmental condition relative to a second impedance of a switched capacitor of the switched-capacitor front end and compensating the signal path for a change in gain of the signal path resulting from the change of the first impedance.

Compensation of environmental drift by tracking switched capacitor impedance versus resistor impedance

In accordance with embodiments of the present disclosure, a method may include, in a system comprising a differential filter comprising a plurality of impedance elements, applying a common-mode signal to the differential filter, measuring an output signal of the differential filter in response to the common-mode signal to determine an error due to impedance mismatch of the impedance elements, and tuning one or more of the plurality of impedance elements to minimize the error.

Calibration of anti-aliasing filter mismatch

A system may include a switched-capacitor analog front end comprising a plurality of switches for sampling an analog physical quantity and a bootstrap generation network electrically coupled to the plurality of switches and configured to generate a bootstrap sampling clock for controlling the plurality of switches and generate a floating supply voltage for the bootstrap sampling clock based on the analog physical quantity.

Beyond-the-rails switched-capacitor floating front end with over-voltage protection

This application relates to methods and apparatus for driving a transducer with switching drivers. A switching driver has first and second supply node for receiving supply voltages and includes an output bridge stage, a capacitor and a network of switches. The network of switches is operable in different switch states to provide different switching voltages to the output bridge stage. A controller is configured to control the switch state of the network of switches and a duty cycle of output switches of the output bridge stage based on an input signal to generate an output signal for driving the transducer.

This application relates to methods and apparatus for driving a transducer with switching drivers where the switching driver has an output bridge stage for switching an output node between switching voltages and a modulator for controlling the duty cycle of the output bridge stage based on an input signal. The switching driver also includes a voltage controller for providing the switching voltages which is operable to provide different switching voltages in different driver modes. A controller is provided to control the driver mode of operation and the duty cycle of the switching driver based on the input signal, and the controller is configured to transition from a present driver mode to a new driver mode by controlling the voltage controller to provide the switching voltages for the new mode and controlling the modulator to vary the duty cycle of the output bridge stage. The change in duty cycle is controlled such that there is no substantial discontinuity in switching ripple due to the mode transition.

A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity. The sensor readout channel may include a first-order sigma-delta modulator having a modulator input and a modulator output, first outside chopping switches located at the modulator input, second outside chopping switches located at the modulator output, an auxiliary path having an analog-to-digital converter (ADC) having an auxiliary path input and an auxiliary path output, the auxiliary path input configured to receive as its input signal a signal output by a memory element of the first-order sigma-delta modulator, and a signal combiner configured to combine a modulator output signal generated by the first-order sigma-delta modulator with an auxiliary path output signal generated by the auxiliary path to generate a combined output signal.

Sigma-delta modulator with residue converter for low-offset measurement system

A signal processing system may include a signal path and a chop management circuit. The signal path may comprise a chopper configured to chop a differential input signal to the signal path at a chopping frequency and a low-pass filter downstream of the chopper and configured to filter out intermodulation products of a direct current offset of the signal path and intermodulation products of an aggressor on the differential input signal in order to generate an output signal. The chop management circuit may be communicatively coupled to the chopper and configured to, based on operational parameters associated with the signal path, dynamically manage energy of one or more clock signals used to define the chopping frequency.

Chop tone management for a current sensor or a voltage sensor

Driver circuitry for driving a load based on an input signal, comprising: at least one variable boost stage comprising: first and second input nodes configured to receive a first voltage and a second voltage respectively; first and second flying capacitor nodes for connection to a flying capacitor therebetween; a network of switching paths for selectively connecting the first and second input nodes with the first and second flying capacitor nodes; an output stage for selectively connecting a driver output node to each of the first and second flying capacitor nodes; and a controller operable in a first boost mode to: control the output stage to selectively connect the driver output node to the first flying capacitor node; control the network of switching paths to switch connection of the second flying capacitor node between the first and second input nodes at a controlled duty cycle; and in a first charge top-up cycle, control the network of switching paths to connect the first input node to the first flying capacitor node during a phase of the controlled duty cycle in which the first input node is connected to the second flying capacitor node; wherein the frequency of the controlled duty cycle is greater than the frequency of the charge top-up cycle.

Driver circuitry

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Austin, TX, United States of America

Axel Thomsen