Koninklijke Philips Corporation N.V.

U.S. Philips Corporation

Nxp B.v.

Axel Kattner

Joachim C Brilka

Holger Gehrt

Holger Moll

Ernst-Peter Ragosche

The invention relates to a compensation circuit for filters of a video signal receiver. To compensate a non-linear amplification of a small signal in dependence upon the control of a large signal which is superimposed on the small signal, the invention proposes to detect the control of the large signal and to vary the working point of the filter in dependence upon the control of the large signal. Since the filter amplifies the small signal differently in dependence upon the position of the working point, the non-linearity of the filter can thereby be compensated.

Compensation circuit for frequency filters

In order to improve a circuit arrangement () and a method of controlling at least one transistor (), especially of controlling the resistance value of at least one MOS transistor with vanishing DC modulation in such a way that a compensation of resistance variations without control deviation is also possible for the case where the transistor () is operated with a vanishing DC voltage, i.e. with a zero DC voltage and indeed without the aid of a reference frequency, it is suggested that in addition to at least a first reference element (), which has at least a first reference transistor () with a first offset from the operating point, at least a second reference element () is provided which has at least a second reference transistor () with a second offset from the operating point equal in value but opposed in sign to the first buffer storage, wherein an in particular arithmetic average can be formed from the first offset and the second offset for approximating and achieving an optimum operating point.

Circuit arrangement and transistor control method

A filter for processing frequency signals, preferably received, particularly digital television signals is described, which filter comprises a Chebyshev filter (), a subsequent all-pass filter () and a control device (to) for controlling the Chebyshev filter () and the all-pass filter ().

Integrated DVB filter

For an optimal adjustment of the filter frequency of a signal filter, independently of external influences, process spreads and temperature fluctuations, a filter circuit for filtering at least one sound carrier in a composite video signal by at least one signal filter ( ) having at least one filter frequency which is adjustable in dependence upon a control signal, is characterized in that the filter circuit ( ) includes a reference filter ( ) whose filter frequency is adjustable in dependence upon the control signal and which shifts the phase of a reference signal applied thereto by a defined value when tuning the filter frequency to the frequency of said reference signal, in that a phase comparator ( ) is provided which receives the output signal of the reference filter ( ) and the reference signal, in that the control signal is derived from the output signal of the phase comparator ( ) in such a way that the reference filter ( ) is tuned to the frequency of the reference signal, and in that an output signal of a controlled oscillator ( ) of a phase-locked loop ( ) is used as a reference signal which serves for demodulating a sound signal modulated on the sound carrier and whose controlled oscillator ( ) supplies an output signal at the frequency of the sound carrier in the locked state of the phase-locked loop ( ).

Filter circuit

For varying the filter frequencies in an integrator-filter circuit for filtering a push-pull signal by at least two integrator signal filters (31, 32, 33) having integrator elements (1), whose filter frequencies are adjustable by control currents (I.sub.n,1, I.sub.n,2) applied to the integrator elements (1), the integrator-filter circuit includes a reference integrator filter (38) having at least two integrator elements (1) constructed in an identical technique as the other integrator elements (1). This reference integrator filter, when tuned to the frequency of a test signal applied thereto, shifts the phase of the test signal by a defined value, and is arranged subsequent to a phase comparator (39) which also receives the test signal, so that a correction signal is derived from the output signal of the phase comparator (39), in dependence upon this correction signal. The control currents (I.sub.n,1, I.sub.n,2) applied to the integrator elements (1) of the reference integrator filter (38) and the integrator signal filters (31, 32, 33) are generated and in response to the control currents the reference integrator filter (38) is tuned to the frequency of the test signal applied thereto, in that the integrator signal filters (31, 32, 33) are tuned to rated frequencies in dependence upon the correction signal when the reference integrator filter (38) is tuned exclusively in response to the two control currents to a reference frequency test signal applied thereto. For tuning the integrator signal filters (31, 32, 33) at filter frequencies deviating by a predeterminable detuning value from the rated frequencies, at least a switching control current is superimposable on the control currents applied to the reference integrator filter (38), this switching control current being dimensioned in such a way that, when tuning the reference integrator filter (38) to the test signal by the correction signal, this test signal causes the integrator signal filters (31, 32, 33) to tune to frequencies which deviate by the detuning value from their rated frequencies.

Integrator-filter circuit

To achieve a constant control range in an integrator-filter circuit for filtering a push-pull signal, having at least two integrator elements (1) this second control current being having resistors (11, 12) arranged at its inputs, a subsequent current multiplier (13) having two signal inputs (14, 15) and preceding a push-pull amplifier (18) with an inverting input (20) and a non-inverting input (19), having inverting output (21) fed back to the non-inverting input (19) and a non-inverting output (23) fed back to the inverting input (20) via capacitances (22, 24), the current multiplier (13) receiving, at two control inputs (37, 38), a first and a second control current (I.sub.1, I.sub.2) for adjusting the integration time constant of the integrator element (1) is adjustable and from which the second control current (I.sub.2) flows in substantially two halves through the signal inputs (14, 15) of the current multiplier (13), an associated third control current (I.sub.3) is generated which, in dependence upon a second control voltage (U.sub.2) is generated, at whose variation the third control current (I.sub.3) varies proportionally to the second control current (I.sub.2). An associated compensation circuit (2) is provided for each integrator element (1).

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Seevetal, Germany

Axel Kattner