Mellanox Technologies Tlv Ltd.

Mellanox Technologies, Ltd.

Nvidia Corporation

Aviv Kfir

Gil Levy

Barak Gafni

Liron Mula

Matty Kadosh

Zachy Haramaty

Pedro Reviriego

Salvatore Pontarelli

Benny Koren

Niv Aibester

Ilya Vershkov

Eitan Zahavi

George Elias

Itamar Rabenstein

Yuval Shpigelman

Eran Gil Beracha

Nir Monovich

Avner Hadash

Jacob Ruthstein

Ortal Ben Moshe

Idan Burstein

Lion Levi

Ariel Almog

Amir Roitshtein

Ido Bukspan

Lavi Koch

Oren Duer

Sagi Kuks

Omer Shabtai

Aviad Raveh

Marian Pritsak

Alan Lo

Yonatan Piasetsky

David Mozes

Yonatan Piasetzky

Alon Singer

Idan Matari

Shridhar Rasal

Maty Golovaty

Ran Shani

Fima Kravchik

Linor Nehab

Ortal Ben-Moshe

Michael Taher

Amir Mizrahi

Tom Remen

Miri Shtaif

Eduard Kvetny

A device, communication system, and method are provided. In one example, a system for routing traffic is described that includes a plurality of ports to facilitate communication over a network. The system also includes a controller to selectively activate or deactivate ports of the system based on queue depths and additional information to improve power efficiency of the system.

Adaptive port routing

A networking device and system are described, among other things. An illustrative system is disclosed to include a shared buffer and at least a flow controller. In some embodiments, the system and/or flow controller may be configured to measure a packet flow's bandwidth consumption of the shared buffer, assign a flow-type attribute to the packet flow based on the packet flow's bandwidth consumption of the shared buffer, select a shared buffer schema for the packet flow based on the flow-type attribute assigned to the packet flow, and apply the selected shared buffer schema to the packet flow. For example, the flow-type attribute assigned to the packet flow may comprise a mice flow state or an elephant flow state, and a reserve attribute may be assigned to the flow based on the packet flow being assigned the mice flow state or the elephant flow state.

Mice-elephant aware shared buffer schema

Apparatus for global policing of a bandwidth of a flow, the apparatus including a network device including a local policer configured to perform bandwidth policing on the flow within the network device, and a communications module configured to: send local policer state information from the local policer to a remote global policer, and receive policer state information from the remote global policer and update the local policer state information based on the remote global policer state information. Related apparatus and methods are also provided.

Global policers

A network device includes one or more ports, and action-select circuitry. The ports are to exchange packets over a network. The action-select circuitry is to determine, for a given packet, a first search key based on a first header field of the given packet, and a second search key based on a second header field of the given packet, to compare the first search key to a first group of compare values, to output a multi-element vector responsively to a match between the first search key and a first compare value, to generate a composite search key by concatenating the second search key and the multi-element vector, to compare the composite search key to a second group of compare values, and, responsively to a match between the composite search key and a second compare value, to output an action indicator for applying to the given packet.

Efficient memory utilization for cartesian products of rules

A method for filtering packets, the method including receiving a plurality of packets, each packet of the plurality of packets including a source address, and for each one packet of the plurality of packets, processing the one packet by performing the following: modifying the source address of the one packet to include at least an identifier of a flow to which the one packet belongs. Related apparatus and methods are also provided.

Stateful filtering systems and methods

Networking devices, systems, and methods are provided. In one example, a method includes receiving a packet at a networking device; evaluating the packet; based on the evaluation of the packet, truncating the packet from a first size to a second size that is smaller than the first size; and storing the truncated packet in a buffer prior to transmitting the truncated packet with the networking device.

Early and efficient packet truncation

A device, a switch, and a method of determining latency which exceeds a threshold are described. A task is enqueued and a time is determined based on two clocks. A time the task is dequeued is determined based on the two clocks. Based on the time of enqueue and the time of dequeue according to each of the two clocks, the task is identified as meeting or violating a service level agreement.

Latency detection using multiple clocks, including determination of whether latency exceeds a threshold

A networking device and system are described, among other things. An illustrative system is disclosed to include a packet parser and a state machine that includes a NULL header state. The packet parser references the state machine to enter the NULL header state automatically in response to parsing a packet header of a predetermined type and then, while in the NULL header state, analyzes a subsequent set of bytes without advancing a parser pointer.

Parsing using null header node

Devices, methods, and systems are provided. In one example, a device is described to include a bandwidth-constrained resource and a controller that dynamically allocates a proportional consumption of storage to the bandwidth-constrained resource thereby enabling the bandwidth-constrained resource to provide bandwidth to a consuming entity. The controller may allocate the proportional consumption of the storage to the bandwidth-constrained resource based on a current state of the bandwidth-constrained resource.

Dynamically reserved resource allocation

A network device includes one or more ports, and action-select circuitry. The ports are to exchange packets over a network. The act-ion-select circuitry is to determine, for a given packet, a first search key based on a first header field of the given packet, and a second search key based on a second header field of the given packet, to compare the first search key to a first group of compare values, to output a multi-element vector responsively to a match between the first search key and a first compare value, to generate a composite search key by concatenating the second search key and the multi-element vector, to compare the composite search key to a second group of compare values, and, responsively to a match between the composite search key and a second compare value, to output an action indicator for applying to the given packet.

An apparatus includes an input interface to receive incoming packets from a first network device and an output interface to send outgoing packets to a second network device. Media access control security (MACsec) circuitry is coupled between the input interface and the output interface. Bypass flow-control (FC) circuitry is coupled between the input interface and the MACsec circuitry. The bypass FC circuitry is to detect an FC packet in the incoming packets and pass the FC packet passively to the output interface to enable end-to-end flow control directly between the first network device and the second network device.

End-to-end flow control with intermediate media access control security devices

A system includes a hardware circuitry having a device coupled with one or more external memory devices. The device is to detect an input/output (I/O) request associated with an external memory device of the one or more external memory devices. The device is to record a first timestamp in response to detecting the IO request transmitted to the external memory device. The device is further to detect an indication from the external memory device of a completion of the IO request associated with the external memory device and record a second timestamp in response to detecting the indication. The device is also to determine a latency associated with the IO request based on the first timestamp and the second timestamp.

Hardware latency monitoring for memory device input/output requests

A network element includes one or more ports and a packet processor. The one or more ports are to transmit and receive packets over a network. The packet processor is to apply a plurality of rules to the packets, each rule specifying (i) expected values for each header field of a group of header fields of the packets, including, for a given header field in the group, at least a set of multiple expected values, (ii) a group ID associated with the set, and (iii) an action to be applied to the packets whose header fields match the expected values.

Optimizing header-based action selection

A network device includes processing circuitry and multiple ports. The multiple ports are configured to connect to a communication network. The processing circuitry is configured to select a first port among the multiple ports to serve as an egress port for a packet, and to forward the packet to the first port, irrespective of whether or not the first port is usable as the egress port. The processing circuitry is further configured to, when the first port is usable as the egress port, transmit the packet to the communication network via the first port, and when the first port is unusable as the egress port, forward the packet from the first port to a second port among the multiple ports and transmit the packet to the communication network via the second port.

Fast rerouting using egress-port loopback

A network-connected device includes at least one communication port, packet processing circuitry and Diagnostics Direct Memory Access (DMA) Circuitry (DDC). The at least one communication port is configured to communicate packets over a network. The packet processing circuitry is configured to receive, buffer, process and transmit the packets. The DDC is configured to receive a definition of (i) one or more diagnostic events, and (ii) for each diagnostic event, a corresponding list of diagnostic data that is generated in the packet processing circuitry and that pertains to the diagnostic event, and, responsively to occurrence of a diagnostic event, to gather the corresponding list of diagnostic data from the packet processing circuitry.

Direct memory access (DMA) engine for diagnostic data

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Nili, Israel

Aviv Kfir