Texas Instruments Corporation

Avinash Vasudev Sakleshpur

Jaiganesh Balakrishnan

Nagarajan Viswanathan

Karthik Khanna Subramani

A direct down-conversion (DDC) front end receiver includes first Q-channel that filters a sum of PRBS and baseband quadrature signals to generate a first filtered quadrature signal, a second Q-channel that filters a difference of the baseband and PRBS signals to generate a second filtered quadrature signal, a first I-channel and a second I-channel, Q-path and I-path PRBS cancellation blocks for cancelling corresponding PRBS components from sum of first and second filtered quadrature signals and sum of first and second filtered inphase signals respectively, Q-path and I-path sum filter estimation blocks for estimating quadrature and inphase sum filter responses. An IQ mismatch compensation filter estimate and tracking block estimates IQ mismatch compensation filter response from estimated quadrature and inphase sum filter responses, and an IQ mismatch compensation filter filters the modified inphase signal with the IQ mismatch compensation filter response, to generate a filter compensated inphase signal.

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Bengaluru, India

Avinash Vasudev Sakleshpur