Nvidia Corporation

Avinash J V

Padam Patt Krishnani

Anirban Ghosh

Shraddha Manohar Gondkar

Phanikumar Parvatham

Hari Unni Krishnan

Jyotirmaya Swain

Michael Alan Ditty

Vamshikrishna Yalamaddi

Srinivasa Reddy Kalluri

Sowmya Satya Venkata Naga Siva Sai Bindu Mandapati

In various examples, an integrated circuit includes first and second portions. The first portion includes a timer that starts when the first portion transmits at least one error signal to the second portion. The timer may reset when data corresponding to at least one fault has been cleared from the first portion. The first portion transmits a timeout error signal when the timer indicates at least a predetermined amount of time has elapsed. The second portion receives the at least one error signal and the timeout error signal when the timeout error signal has been sent. The second portion may notify an external system after the timeout error signal is received.

Communicating faults to an isolated safety region of a system on a chip

In various examples, an integrated circuit includes first and second portions operating within separate domains. The second portion has an interface that connects the first and second portions. The second portion selectively locks the interface to prevent communication with the first portion over the interface, and selectively unlocks the interface to allow communication with the first portion over the interface.

Isolating a region of a system on a chip for safety critical operations

In various examples, a system includes a memory operating within a first risk level and circuitry operating within a second risk level that indicates more risk than the first risk level. The circuitry reads and/or writes data to a first memory address within the memory, and reads and/or writes an error detection code to a second memory address within the memory.

Transmitting data between regions of varying safety integrity levels in a system on a chip

Growing community of inventors

Bengaluru, India

Avinash J V