Sun Microsystems, Inc.

Avi Liebermensch

Nayon Tomsio

Harsh D Sharma

Provided are a method and a system to distribute clock signals in digital circuits to ensure that the multiple clock signals reach multiple loads associated with the digital circuit, concurrently. To that end, an off-chip set of clock paths, which includes one or more clock buffers, are connected between two sets of clock paths on an integrated digital circuit. The multiple clock signals are routed to the off-chip set of clock paths to reduce, or remove, propagational delay in multiple clock signals that arise from the propagation of the same through the on-chip clock paths. This is achieved by the clock paths of the off-chip set of clock paths having differing resistivities, differing lengths or both.

Method and a system to distribute clock signals in digital circuits

A circuit package and a method of forming the same that facilitates control of the impedance of a driving circuit employing resistive vias formed into a dielectric substrate.

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Cupertino, CA, United States of America

Avi Liebermensch