Motorola Corporation

Freescale Semiconductor,inc.

Pmc-sierra Us, Inc.

Wintegra Ltd.

Avi Hagai

Eliezer Weitz

Yoram Yeivin

Eran Kirzner

Avi Shalev

Avraham Ganor

Moti Kurnick

Vadim Vayzer

Adi Katz

Itai Katz

Ricardo Berger

Ronen Weiss

Dovrat Zifroni

Eliyahy Shasha

Ronen Amrani

Tao Lang

Nadav Busani

Yossi Socoletzki

Amit David

Yuval Lachman

A method is provided for selecting a transmit link in a bonding group. Traffic is distributed to the links based on a selection method. Typical selection methods for bonded links of the same type include round robin or weighted round robin. A method is disclosed including selecting from among bonded links of different types based on link priority or link-to-group backpressure, sometimes both, and in some cases also based on traffic class. Link priority is based on the reliability, or quality, of the link. Adding link priority, and optionally traffic class, into the selection method allows high priority traffic to be always transported over high quality links. Also, considering the link-to-group backpressure, such as based on congestion status of operational links, or active links, will help avoid link congestion. The method is relevant to Quality of Service (QoS) implementation in transportation systems used for mobile backhaul or carrier access networks.

Link selection in a bonding protocol

A method for determining at least one parameter for a particular AAL2 channel identifier (AAL2-CID), according to which the behavior of the transmission of the user information stream is determined per application. Preferably, the present invention enables the QOS (quality of service) for the user application to be determined by setting a plurality of such parameters for a specific AAL2 CID. The present invention preferably encompasses the ability to determine any parameter that is usually set for the ATM channel to instead be set for the CID separately. These parameters may be dynamically adjusted according to the real-time state of the system, channel and the specific CID. Additionally the selection and usage of said parameters may also be influenced by the real time state of the system, channel and the specific CID. Examples of such parameters include, but are not limited to, traffic type, priority, any type of QOS parameter, timing parameters, and so forth.

[object Object]

A communication controller ( ) for handling and processing data packets received from a large number of communication channels ( ). The communication controller ( ) comprising of: a processor ( ) for processing data; a serial interface ( ), coupled to the communication channels ( ). A multi channel controller ( &prime;) coupled to the serial interface ( ) and the processor ( ), for interfacing between the communication channels ( ) and the processor ( ). The communication channels ( ) and the serial interface ( ) send and receive data packets. The processor ( ) sends, receives and processes data words. The multi channel controller ( ) receives data packets from the serial interface ( ), concatenates data packets and sends data words to the processor ( ). The multi channel controller ( ) receives data words from the processor ( ), and transmits data packets to the serial interface ( ).

Multi channel controller

A reassembly unit comprising of a reassembly buffer and a control unit and a detector. The reassembly unit monitors an amount of data AMD stored in the reassembly register and compares AMD to four thresholds, TS1, TS2, TS3 and TS4. TS1 and TS4 define the size of the reassembly buffer. TS2 defines the delay of reassembly unit 40. A difference between TS1 and TS2 defines an underflow recovery period in which data is not read out of the buffer. A difference between TS4 and TS3 define an overflow recovery period in which data is not written in the buffer. The four thresholds can be changed during an operation of the reassembly unit, allowing a user to adjust the thresholds according to the state of the reassembly unit.

Reassembly unit and a method thereof

A system and a method of the present invention for implementing a combined use Timer_CU within an ATM transmitter. The ATM transmitter being able to handle a plurality of ATM channels, at least one of the channel being an ATM AAL2 channel. The ATM channels can provide ATM-cells at different traffic parameters, such as, for example, different cell or bit rate, priorities, and bursts. The system schedules channels in a first table by channel identifiers. Cyclical pointers to this first table advance (i) at every time slot, (ii) within a time slot, whereas (iii) CPS-Packets with one or more octets already packed wait at most the duration of a Timer_CU before being scheduled to be sent by CPS transmitter to ATM transmitter. Conveniently, the schedule scheme is based upon a scheduling table comprising of a plurality of time slots. CPS-Packets are multiplexed and packed to form a CPS_PDU, the CPS_PDU is submitted to a processor that handles the transmission of ATM cells, each CPS_PDU is converted to an ATM cell and transmitted to a communication channel during a single time slot. Therefore, Timer_CU ends when the ATM cell actually is transmitted.

Apparatus and method for implementing an ATM AAL2 combined use timer

A communication system ( ) comprises interfaces ( ) at communication channels ( , respectively), coupled to a controller ( ) by an address bus ( ) and multiplexer ( ). The interfaces ( ) receive data cells and provide status signals (e.g., clav) indicating, for example, cell availability, independently from interface addresses (ADDR) being present at the address bus ( ). The interfaces ( ) continuously send the status signals to the multiplexer ( ) which receives the interface address (ADDR) at a control input ( ) and forwards the status information of the currently addressed interface to the controller ( ).

Communication system with physical interface and communication controller, and method

A communication system ( ) has a first processor ( ) and a second processor ( ). The first processor ( ) has a first number of address bits (e.g., A&equals;5) to select a first device ( ), and the second processor ( ) has a second number of address bits (e.g., B&equals;4 to select a second device ( ). The processors ( ) are coupled to the devices ( ) by a shared bus ( ) with a total number of bit lines ( ) which is smaller than or equal to the sum of the first and second numbers of bits (e.g., N&equals;8). The bit lines ( ) are assigned to a first outer set ( ), a second outer set ( ) and to an inner set ( ). LSB-bits from the first processor ( ) are coupled to the first outer set ( ), LSB-bits from the second processor ( ) are coupled to the second outer set ( ), and MSB-bit of first and second processors ( ) are multiplexed to the lines of the inner set ( ).

Communication system with communication controller and multiple physical interfaces, and method

A communication controller for handling high speed multi protocol data streams, wherein a stream is comprised of frames. Communication controller has two processors, second processor initializes first processor and handles high level management and protocol functions, first processor handles the data stream transactions. First processor and second processors are coupled to a two external buses. First processor handles a transactions of a frame by executing a task. First processor performs a task switch when there is a need to fetch information from an external unit, coupled to either first or second external bus, if it did process a whole frame, or if there is a need to fetch a portion of a frame from a communication channel.

High performance communication controller for processing high speed data streams wherein execution of a task can be skipped if it involves fetching information from external memory bank

A communication system (100) comprises a processor (150), a channel memory (160), a communication line (180), a transmit connect table (146), a transmit scheduler table (144), and a program memory (148). The channel memory (160) stores channels (161) with data cells (102). The processor (150) writes channel identifiers (e.g., 1 2) into schedule fields (110-V) of the transmit scheduler table (144) and points with a pointer R and a pointer V to the schedule fields (110-V). The pointers R and V identify fields in which the processor (150) looks up for a first channel identifier. The processor (150) forwards data cells (102) from the channel memory (160) to the communication line (180) for the channel (161) corresponding to the first channel identifiers. Then, the processor (150) moves the first channel identifier to an other field and writes a second channel identifier stored in the transmit connect table (146) to the field of the first channel identifier.

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Raanana, Israel

Avi Hagai