Micron Technology Incorporated

Avani F Trivedi

Tracy D Evans

Tomoko Ogura Iwasaki

Aparna U Limaye

Jianmin Huang

Carla L Christensen

Jun Huang

Carly M Wantulok

Ashish Ranjan

Prateek Trivedi

Joseph A De La Cerda

Bruce J Ford

Benjamin Rivera

Nicolas Soberanes

Methods, systems, and devices that support a dynamic screen refresh rate are described. An electronic device may dynamically (e.g., autonomously, while operating) adjust the rate at which a screen is refreshed, such as to balance considerations such as user experience and power consumption by the electronic device. For example, the electronic device may use an increased refresh rate when executing applications for which user experience is enhanced by a higher refresh rate and may use a decreased refresh rate when executing other applications. As another example, the electronic device may use different refresh rates while executing different portions of the same application, as some aspects of an application (e.g., more intense portions of a video game) may benefit more than others from a higher refresh rate. The electronic device may also account of other factors, such as battery level, when setting or adjusting the refresh rate of the screen.

Intelligent adjustment of screen refresh rate

Systems and methods for read operations and management are disclosed. More specifically, this disclosure is directed to receiving a first read command directed to a first logical address and receiving, after the first read command, a second read command directed to a second logic address. The method also includes receiving, after the second read command, a third read command directed to a third logical address and determining that the first logical address and the third logical address correspond to a first physical address and a third physical address, respectively. The first physical address and the third physical address can be associated with a first word line of a memory component while the second logical address corresponds to a second physical address associated with a second word line of the memory component. The method includes executing the first read command and the third read command sequentially.

Sequential SLC read optimization

Systems, apparatuses, and methods related to media management, including 'garbage collection,' in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a battery state associated with the memory system or sub-system may be used as an indicator or basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a battery state or condition satisfies a criterion. Based on determining that the criterion is satisfied the, the garbage collection operation may be postponed until the battery state changes to satisfy a different battery condition.

Garbage collection in a memory sub-system during a low battery state

Systems, apparatuses, and methods related to media management, including 'garbage collection,' in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a signaling can be received that indicates a request from a controller to migrate valid data from a first data block to a second data block. For example, the first data block can be a data block of a plurality of memory cells configured as single-level-cell (SLC) memory. The second data block can be configured as multi-level-cell (MLC) memory. The data migration operation can include an error control operation that is performed using the memory component, the error control operation excluding transferring the data to the controller. The data can be migrated from the first data block configured as SLC memory to the second data block configured as MLC memory after the error control operation is performed using the memory component.

Performing error control operation on memory component for garbage collection

Systems, apparatuses, and methods related to media management, including 'garbage collection,' in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a criticality value can be determined and used as a basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a criticality value associated with performing a garbage collection operation satisfies a condition. Based on determining that the condition is satisfied, a parameter associated with performing the garbage collection operation can be adjusted. The garbage collection operation is performed on the data block stored on the memory component using the adjusted parameter.

Garbage collection in a memory component using an adjusted parameter

Memories having a first pool of memory cells having a first storage density and a second pool of memory cells having a second storage density greater than the first storage density, and a controller configured to cause the memory to determine whether a value of an indication of available power of a power supply for the memory is less than a threshold, and in response to determining that the value of the indication of available power is less than the threshold, increase a size of the first pool of memory cells, limit programming of data received by the memory to the first pool of memory cells, and cease movement of data from the first pool of memory cells to the second pool of memory cells, as well as apparatus including similar memories.

Responding to changes in available power supply

Methods, systems, and devices for adjustable media management are described. A media management operation may be performed at a first rate. During the media management operation, invalid data may be moved from a first block of memory cells to a second block of memory cells at the first rate to free space in the first block. Based on one or more conditions of the memory device, the rate that the media management operation is performed may be adjusted to a second rate. For example, the rate may be lowered based on a quantity of access operations performed on the memory device. Invalid data may continue to be moved from the first block of memory cells to the second block of memory cells at the second rate.

Adjustable media management

Electronic systems might include a plurality of groups of memory cells and a controller for access of the plurality of groups of memory cells that is configured to cause the electronic system to determine whether a reliability of a particular group of memory cells having a particular reliability rank allocated for storing data of a particular data level at a particular memory density is less than a target reliability, and, if so, determine whether the reliability of the particular group of memory cells at a reduced memory density is less than the target reliability, and, in response to determining that the reliability of the particular group of memory cells at the reduced density is less than the target reliability, allocate the particular group of memory cells for storing data of a lower data level and allocate a different group of memory cells for storing data of the particular data level.

Apparatus for managing data storage among groups of memory cells of multiple reliability ranks

Methods, systems, and devices that support a dynamic screen refresh rate are described. An electronic device may dynamically (e.g., autonomously, while operating) adjust the rate at which a screen is refreshed, such as to balance considerations such as user experience and power consumption by the electronic device. For example, the electronic device may use an increased refresh rate when executing applications for which user experience is enhanced by a higher refresh rate and may use a decreased refresh rate when executing other applications. As another example, the electronic device may use different refresh rates while executing different portions of the same application, as some aspects of an application (e.g., more intense portions of a video game) may benefit more than others from a higher refresh rate. The electronic device may also account of rother factors, such as battery level, when setting or adjusting the refresh rate of the screen.

Dynamic screen refresh rate for an electronic device

Methods of operating a memory having a first pool of memory cells having a first storage density and a second pool of memory cells having a second storage density greater than the first storage density, as well as apparatus configured to perform similar methods, might include determining whether a value of an indication of available power is less than a threshold, and, in response to determining that the value of the indication of available power is less than the threshold, increasing a size of the first pool of memory cells, limiting write operations of the memory to the first pool of memory cells, and postponing movement of data from the first pool of memory cells to the second pool of memory cells.

Methods of operating an electronic system include allocating a group of memory cells of a plurality of groups of memory cells having a particular rank of a plurality of ranks for storing data of a particular data level of a plurality of data levels, determining a need for an additional group of memory cells for storing data of the particular data level, moving or discarding data from a different group of memory cells storing data of a different data level of the plurality of data levels in response to determining the need for the additional group of memory cells for storing data of the particular data level, and allocating the different group of memory cells for storing data of the particular data level.

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Eagle, ID, United States of America

Avani F Trivedi