Semiconductor Components Industries, LLC

Aurore Constant

Peter Coppens

Jaume Roig-Guitart

Peter Moens

Abhishek Banerjee

Joris Baele

Brice De Jaeger

Frederick Johan G Declercq

An electronic device can include a gate structure. In an embodiment, the gate structure can include a gate electrode including a doped semiconductor material, a metal-containing member, a pair of conductive sidewall spacers. The first metal-containing member can overlie the gate electrode. The conductive sidewall spacers can overlie the gate electrode and along opposite sides of the first metal-containing member. In another embodiment, the gate structure can include a gate electrode, a first metal-containing member overlying the gate electrode, and a second metal-containing member overlying the first metal-containing member. The first metal-containing member can have a length that is greater than the length of the second metal-containing member and substantially the same length as the gate electrode.

Electronic device including a gate structure and a process of forming the same

An embodiment of a method of forming a programming element using a III/V semiconductor material may include forming one or more recesses in a first portion of a gate material and forming a first conductor on the one or more recesses. In an embodiment, the method may include configuring a programming circuit to form a voltage across the one or more recesses that is greater than a breakdown voltage of the gate material underlying the one or more recesses.

Semiconductor device having a programming element

A semiconductor transistor device includes a GaN transistor including a drain, a gate, and a source, the GaN transistor having a driving voltage applied across the gate and the source and configured to switch between an on-voltage associated with an on-state of the GaN transistor and an off-voltage associated with an off-state of the GaN transistor. The semiconductor transistor device further includes a variable gate-source resistor connected between the gate and the source and having a variable resistance that varies in response to changes in the driving voltage when switching between the on-state and the off-state of the GaN transistor.

Variable resistance to reduce gate votlage oscillations in gallium nitride transistors

Implementations of an ohmic contact for a gallium nitride (GaN) device may include: a first layer including aluminum coupled directly with the GaN device; the GaN having a heterostructure with an undoped GaN channel and a semi-insulating aluminum gallium nitride (AlGaN) barrier, all the foregoing operatively coupled with a substrate; a second layer including titanium coupled over the first layer; and a third layer including an anti-diffusion material coupled with the second layer. A passivation layer may be coupled between the AlGaN barrier and the first layer of the ohmic contact. The passivation layer may surround the ohmic contact.

Method for forming ohmic contacts

An electronic device can include a semiconductor layer and a contact structure forming an ohmic contact with the layer. In an embodiment, the semiconductor layer can include a III-N material, and the contact structure includes a first phase and a second phase, wherein the first phase includes Al, the second phase includes a metal, and the first phase contacts the semiconductor layer. In another embodiment, the semiconductor layer can be a monocrystalline layer having a surface along a crystal plane. The contact structure can include a polycrystalline material including crystals having surfaces that contact the surface of the monocrystalline layer, wherein a lattice mismatch between the surface of the monocrystalline layer and the surfaces of the crystals is at most 20%.

Electronic device including a contact structure contacting a layer

An electronic device can include a channel layer, a first carrier supply layer, a gate electrode of a HEMT, and a drain electrode of the HEMT. The HEMT can have a 2DEG along an interface between the channel and first carrier supply layers. In an aspect, the 2DEG can have a highest density that is the highest at a point between the drain and gate electrodes. In another aspect, the HEMT can further comprise first and second carrier supply layers, wherein the first carrier supply layer is disposed between the channel and second carrier supply layers. The second carrier supply layer be thicker at a location between the drain and gate electrodes. In a further aspect, a process of forming an electronic device can include the HEMT. In a particular embodiment, first and second carrier supply layers can be epitaxially grown from an underlying layer.

Electronic device including a transistor with a non-uniform 2DEG

In an aspect, a circuit can include drain and source terminals; a HEMT having a drain and a source, wherein the drain is coupled to the drain terminal; and a variable resistor having a first electrode and a second electrode. The first electrode can be coupled to the source of the HEMT, and the second electrode can be coupled to the source terminal. In another aspect, an electronic device can include a source terminal; a heterojunction between a channel layer and a barrier layer; a source electrode of a HEMT overlying the channel layer; a first resistor electrode overlying the channel layer and spaced apart from the source electrode, wherein the first resistor electrode is coupled to the source terminal; and a variable resistor, wherein from a top view, the variable resistor is disposed along the heterojunction between the source electrode and the first resistor electrode.

Electronic device and circuit including a transistor and a variable resistor

Implementations of an ohmic contact for a gallium nitride (GaN) device may include: a first layer including aluminum coupled directly with the GaN device; the GaN having a heterostructure with an undoped GaN channel and a semi-insulating aluminum gallium nitride (AlGaN) barrier, all the foregoing operatively coupled with a substrate; a second layer including titanium coupled over the first layer; and a third layer including an anti-diffusion material coupled with the second layer. The passivation layer may be coupled between the AlGaN barrier and the first layer of the ohmic contact. The passivation layer may surround the ohmic contact.

An electronic device can include a substrate having a primary surface; a monocrystalline semiconductor film overlying the primary surface of the substrate; and a polycrystalline compound semiconductor layer adjacent to the monocrystalline semiconductor film. In an embodiment, the polycrystalline compound semiconductor layer has a dopant concentration at most 1&#xd7;10atoms/cm, a donor concentration of greater than 1&#xd7;10donors/cm, and is part of a contact of an electrode of a transistor. In another embodiment, the electronic device can further include an interconnect over the polycrystalline compound semiconductor layer, wherein a combination of the interconnect and polycrystalline compound semiconductor layer form an ohmic contact. In a further embodiment, a polycrystalline compound semiconductor layer can be adjacent to the monocrystalline semiconductor film, wherein an energy level of a conduction band of the polycrystalline compound semiconductor layer is lower than its Fermi energy level.

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Oudenaarde, Belgium

Aurore Constant