Kioxia Corporation

Kabushiki Kaisha Toshiba

Aurelien Nam Phong Tran

Takashi Hirao

Hiroki Matsudaira

Shinichi Kanno

Kenji Tanaka

Hirokuni Yano

Yuki Sasaki

Mitsunori Tadokoro

Shinji Yonezawa

Norio Aoyama

Ryuji Nishikubo

Tatsuya Sumiyoshi

Mel Stychen Sanchez Tan

Yoshimi Niisato

According to an embodiment, a memory system includes a nonvolatile memory and a memory controller. The nonvolatile memory includes storage areas. The memory controller counts a first number that is the number of uncompleted requests generated in a first time section for read operations to be executed on a first storage area. In a second time section subsequent to the first time section, the memory controller waits until the first number becomes zero without executing an erase operation on the first storage area while the first number is not zero, and executes the erase operation on the first storage area in response to the first number becoming zero.

Memory system and method

According to one embodiment, in response to restoration of power to a memory system, a controller in the memory system notifies a host that the memory system is ready. When an input/output command specifying a logical address belonging to a logical address range is received, the controller selects a block corresponding to the logical address range and rebuilds, based on address translation information and an update log which are stored in the selected block, the latest address translation information corresponding to the logical address range. The controller updates the rebuilt latest address translation information, based on a list of logical addresses corresponding to lost write data, stored in the selected block.

Memory system including nonvolatile memory and method of controlling the same

A memory system includes a nonvolatile memory and a controller that performs first, second, and third processes on memory cells of the nonvolatile memory. The first process is performed on first memory cells to store a first value therein, such that a highest threshold voltage among the threshold voltages of the first memory cells is set as a first threshold voltage. The second process is performed on second memory cells to store a second value therein, such that a lowest threshold voltage among the threshold voltages of the second memory cells is set as a second threshold voltage higher than the first threshold voltage. The third process performed on third memory cells such that a lowest threshold voltage in the third memory cells is lower than the first threshold voltage, and a highest threshold voltage in the third memory cells is higher than the second threshold voltage.

Memory system

According to one embodiment, a memory system includes non-volatile memory, a block management table that stores whether data in the non-volatile memory is valid or invalid in a unit of cluster, and a controller configured to execute compaction. In the block management table, first information related to likelihood that valid data within the block is invalidated is registered for each of the blocks. The controller is configured to select a block to be a target of the compaction based on the first information and use the selected block to execute the compaction.

Memory system, controller and control method of memory

A management information generating method wherein logical and physical block addresses (BAs) of continuous addresses are associated with each other in the BA translation table. When a logical block is constructed, a value is set for a maximum number of allowable defective physical blocks. A logical block having fewer defects than the set number is set usable, and a logical block having more defects than the set number is set unusable. System logical block construction is performed to preferentially select physical blocks from a plane list including a large number of usable blocks to equalize the number of usable blocks in each plane list. It is determined whether the number of free blocks is insufficient on the basis of a first management unit and whether the storage area for the indicated capacity can be reserved on the basis of the management unit different from the first unit.

Management information generating method, logical block constructing method, and semiconductor memory device

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Yokohama, Japan

Aurelien Nam Phong Tran