Chips and Technologies, Llc.

Aurav R Gollabinnie

Cheng Kai Chen

Au H Nguyen

Rashid N Khan

Brian Verstegen

Win-Sheng Cheng

Chien-Feng Cheng

A circuit for waking a microprocessor from a sleep mode and providing it with its microprocessor clock long enough for a refresh, direct memory access (DMA) or master cycle operation to be done by external circuitry. The clock signal is then removed from the microprocessor to put it back into the sleep mode, thereby conserving energy. A hold signal is provided to the microprocessor to cause the microprocessor outputs to be put into a tri-state, high impedance condition, and thus relinquish control of the external bus to the external refreshing circuitry.

Sleep mode refresh apparatus

A method and apparatus for suspending the operation of a computer at any desired point and resuming operation at exactly the same point is disclosed. At the point where suspension is chosen, the current state of the computer is stored in the computer's Random Access Memory and power is disconnected to all other components in the computer. When resumption of operation is commanded, power is restored to all components and the current computer state is retrieved from the Random Access Memory and restored, allowing operations to continue from exactly the same point as they were suspended. The invention encourages turning off the computer for even brief periods of non-use, as there is almost no waiting time when resumption of operation is commanded.

Suspend/resume apparatus and method for reducing power consumption in

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San Jose, CA, United States of America

Aurav R Gollabinnie