Amkor Technology, Inc.

August Joseph Miller, Jr

Johnnie Quan

Roger D St Amand

Jeffrey Alan Miks

Mahmoud Dreiza

Alexander William Copia

Ruben Fuentes

Jeffery Alan Miks

Christopher Scanlan

Kurt Raymond Raab

KwangSeok Oh

Methods for temporary bussing of semiconductor package substrates are disclosed and may include metal plating regions of a packaging substrate utilizing a plurality of bussed traces, which may be decoupled by forming debuss holes at intersections of the bussed traces. The decoupled traces may then be electrically tested, and the packaging substrate may be singulated into a plurality of substrates utilizing a sawing process through singulation areas in the packaging substrate. The traces may be electrically coupled via plating bars in the substrate. The plating bars may be located in the singulation areas. The intersections of the bussed traces may be in a Y pattern, which may be repeated along the singulation areas. The debuss holes may be formed utilizing mechanical drilling or lasing. The regions of the packaging substrate may be metal plated utilizing an electroplating process. The plurality of bussed traces may be biased for the electroplating process.

Methods for temporary bussing of semiconductor package substrates

An electrical circuit having a spatially-efficient MEMS architecture, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

Integrated circuit with efficient MEMS architecture

An electronic component package includes a substrate having a first surface, an electronic component mounted to the substrate, traces on the first surface, a terminal on the first surface, and a solder mask on the first surface. The solder mask includes a solder mask opening exposing the terminal. An electrically conductive coating and/or conductive coating feature is formed on the solder mask and extends into the solder mask opening to contact and be electrically connected to the terminal. The conductive coating may be grounded to shield the electronic component from electromagnetic interference (EMI). Further, the conductive coating provides a ground plane for the traces facilitating impedance matching of signals on the traces. In addition, the conductive coating has a high thermal conductivity thus enhancing heat dissipation from the electronic component. The conductive coating feature can be used as a conductive path to transmit electrical signals and/or to form circuit patterns that can be used as passive devices.

Shielded electronic component package and method

A stacked inverted flip chip package includes a substrate having a secondary electronic component opening and first traces. Primary flip chip bumps electrically and physically couple a primary electronic component structure to the substrate. Secondary flip chip bumps electrically and physically couple an inverted secondary electronic component to the primary electronic component structure between the primary electronic component structure and the substrate and within the secondary electronic component opening. By placing the secondary electronic component between the primary electronic component structure and the substrate, the height of the stacked inverted flip chip package is minimized.

Stacked inverted flip chip package and fabrication method

A thermal via heat spreader package includes an electronic component having an active surface including a nonfunctional region. A package body encloses the electronic component, the package body comprising a principal surface. Thermal vias extend from the principal surface through at least a portion of the package body and towards the nonfunctional region. A heat spreader is thermally connected to the thermal vias. Heat generated by the electronic component is dissipated to the thermal vias and to the heat spreader. The density of the thermal vias is increased in a hotspot of the electronic component thus maximizing heat transfer from the hotspot. In this manner, optimal heat transfer from the electronic component is achieved.

Growing community of inventors

Queen Creek, AZ, United States of America

August Joseph Miller, Jr