Ricoh Company, Ltd.

Atsushi Suzuki

Yuuya Miyoshi

Masamoto Nakazawa

Tohru Kanno

An improved solid-state image sensor including a plurality of pixels. Each of the pixels includes a photoelectric convertor to convert a light signal into an electrical charge; a transfer transistor to transfer the electrical charge to a floating diffusion; a reset transistor to reset the floating diffusion; and an amplifier transistor to amplify a signal when the floating diffusion is connected to a gate of the amplifier transistor. A first voltage is set less than or equal to a second voltage. Each of a third voltage and a fourth voltage is set higher than a voltage of a ground. The third voltage is a gate voltage of the transistor resistor at times other than the time of reading a signal of the pixel and the fourth voltage is a gate voltage of the reset transistor at times other than a reset time of the reset transistor.

Solid-state image sensor and image capturing device with setting of gate voltages of transfer and reset transistors

A solid-state image sensing device includes a pixel array, control lines, signal lines, a pixel control circuit, and a read circuit. The pixel array includes pixel sub-arrays arranged in a main scanning direction and each including pixels arranged to form rows along the main scanning direction and at least one column along a sub-scanning direction. Each of the control lines is connected to at least one pixel in in one of the pixel sub-arrays. Pixels in each of the least one column is connected to different control lines. Each of the signal lines is connected to all pixels in each of the least one column in one of the pixel sub-arrays. The pixel control circuit generates a pixel signal in each pixel and the read circuit reads the pixel signal from each pixel to cause successive phase differences between the pixel sub-arrays.

Solid-state image sensing device and imaging apparatus

A solid-state image sensor includes a pixel unit having a plurality of pixels arranged in matrix, a read signal processing circuit, a test signal output circuit, a test signal generating circuit, and a control circuit that controls operations of the above mentioned circuits. Each of the plurality of pixels outputs a pixel signal that is obtained by amplifying a photoelectrically converted signal using an output amplifier in one or more pixel units. The read signal processing circuit reads the pixel signal output from the pixel unit in units of one or more pixels to a corresponding signal line and processes the pixel signal. The test signal output circuit, having a test output amplifier for each signal line, outputs a signal from the test output amplifier to the signal line in response to a test signal input to the test output amplifier. The test signal generating circuit generates the test signal.

Solid-state image sensor and imaging apparatus

A photoelectric conversion element includes a plurality of pixels to receive light; and a signal processor to process a signal of the pixels. The signal processor includes: a first element, being a transistor, having a first effective channel width through which a current can effectively pass through in the first element; and a second element, being a transistor, having a second effective channel width through which a current can effectively pass through in the second element. The first effective channel width of the first element is larger than the second effective channel width of the second element.

Photoelectric conversion element and image processing apparatus

A solid-state image sensor includes a pixel array including a plurality of pixel sub-arrays arranged in a main scanning direction, each of the pixel sub-arrays having a plurality of pixels two-dimensionally arranged to form a plurality of rows along the main scanning direction and a plurality of columns along the sub-scanning direction. The solid-state image sensor further includes control lines, signal lines, a pixel control circuit, and a read out circuit. The pixel control circuit applies a control signal to each pixel of each of the plurality of pixel sub-arrays through each of the plurality of signal lines, to cause each pixel to generate a pixel signal having a phase difference between the plurality of pixel sub-arrays. The readout circuit reads the pixel signal from each pixel of each of the plurality of pixel sub-arrays such that the pixel signal has a phase difference between the plurality of pixel sub-arrays.

An pixel unit includes a photoelectric conversion element, a transfer transistor having a transfer gate abutting on the photoelectric conversion element, and a floating diffusion region on which the transfer gate abuts, wherein the transfer gate includes a first gate portion having a first gate width in a gate width direction, the first gate portion abutting on the floating diffusion region and extending away from the floating diffusion region in a gate length direction, and a second gate portion having a second gate width narrower than the first gate width in the gate width direction, the second gate portion extending continuously from the first gate portion in the gate length direction, and wherein a width of the second gate portion gradually decreases from the first gate width to the second gate width toward a direction away from the first gate portion.

Pixel unit and imaging device

A pixel unit includes a photoelectric conversion element; a first transistor, which is coupled to the photoelectric conversion element, configured to transfer an electric charge that has been subjected to photoelectric conversion at the photoelectric conversion element; a second transistor configured to reset the electric charge transferred by the first transistor; and a diffusion region including diffused impurities. The diffusion region accumulates the electric charge transferred from the first transistor. The diffusion region is disposed between the first and second transistors. The diffusion region includes a first region that is directly coupled to gates of the first and second transistors; and a second region that is adjacent to the first region, the second region being directly coupled to the gate of the first transistor and being coupled to the second transistor via the first region. The impurity concentration is lower in the second region than in the first region.

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Hyogo, Japan

Atsushi Suzuki