Nec Electronics Corporation

Renesas Electronics Corporation

Atsushi Shimatani

Kouichi Nishimura

Toshikazu Murata

Motoyasu Ichimura

A differential amplifier circuit includes a first differential transistor pair, a second differential transistor pair, an adder section and an amplifying unit. The first differential transistor pair receives first and second input signals and an output signal as a third input signal, and the second differential transistor pair receives the first and second input signals and the output signal as a fourth input signal. The adder section adds first output signals from the first differential transistor pair and second output signals from the second differential transistor pair, and the amplifying unit amplifies an addition resultant signal from the adder section to output to the first and second differential transistor pairs.

Differential amplifying circuit

In a display panel driver an output amplifier circuit includes a first output stage to receive a power supply voltage and a first voltage lower thereto and to output a drive voltage in a first voltage range defined between the power supply voltage and a middle power supply voltage; and a second output stage to receive the power supply and ground voltages and to output a drive voltage between the power supply and ground voltages. In a first mode that the first voltage is set as the middle power supply voltage, the first output stage outputs a first drive voltage in the first voltage range to one of first and second output terminals. In a second mode that the first voltage is set as the ground voltage, the second output stage outputs a first drive voltage in the first voltage range to one of the first and second output terminals.

Display panel driver and display apparatus using the same

In a class AB amplifier circuit, an input stage circuit includes a first differential pair configured to receive a differential signal and a first current mirror circuit connected with the first differential pair through a first node. A middle stage circuit includes a floating constant current source connected with the first node, a first transistor whose gate is applied with a bias voltage, and a first constant current source connected with the first node through the first transistor. A last stage circuit includes a first output stage transistor whose gate is connected with the first node and which controls a voltage of an output terminal. A first phase compensation capacitance has one end connected with a first connection node between the first constant current source and the first transistor and the other end connected with the output terminal.

Class AB amplifier circuit and display apparatus

The present invention enables rising and falling slew rates to be symmetrized and secures a drive current at the time of 2H inversion driving. An operational amplifier in accordance with one aspect of the present invention includes: a first output transistor and a second output transistor connected in series between a first power supply and a second power supply; an output terminal connected to a node between the first output transistor and the second output transistor; a phase-compensating element provided either between the gate of the first output transistor and the output terminal or between the gate of the second output transistor and the output terminal; and a floating current source connected between the gate of the first output transistor and the gate of the second output transistor.

Operational amplifier, drive circuit, and method for driving liquid crystal display device

An input stage of a differential amplifier includes a differential pair formed by an N-channel MOS transistor MNhaving a gate connected to an INM and an N-channel MOS transistor MNhaving a gate connected to an INP, both having sources connected to each other, a constant current source connected to the sources of the MNand MNand a variable current source connected to the sources of the MNand MNA subsequent-stage processing circuit having an intermediate stage and an output stage includes a phase compensation capacitor and outputs an output responsive to a change in the differential inputs by charging and discharging the phase compensation capacitor through the constant current source. The variable current source turns ON when the change reaches a level causing a parasitic capacitor at the sources of the differential pair to be discharged, and supplies a current for discharging the parasitic capacitor.

Differential amplifier

According to an aspect of the invention, there is provided a drive circuit for driving a capacitive load. The drive circuit comprises an amplification circuit for amplifying an input signal and outputting the amplified signal to the capacitive load and an operation state detection circuit for detecting an operation state of output operation to the capacitive load in the amplification circuit. A variable resistor is connected between the amplification circuit and the capacitive load and changes the resistance value according to the detected operation state.

Drive circuit, operation state detection circuit, and display device

Disclosed is a differential amplifier which comprises a differential pair comprising depletion-type first and second N-channel MOS transistors, a first current source that supplies a current for the differential pair, a current mirror circuit formed by transistor pairs connected in cascode fashion in two stages, for connecting an output pair of the differential pair in folded connection, second and third current sources connected to an input terminal of the current mirror circuit and an output terminal of the current circuit, respectively, and a buffer amplifier with that has an input terminal connected to the output terminal of the current mirror circuit and has an output terminal connected to an output terminal of the differential amplifier.

Differential amplifier and display device using the same

A decoder circuit configured to output an analog voltage signal according to input digital data includes an operational amplifier, first selection circuit and compensation unit. The operational amplifier includes a plurality of input differential pairs and generates an output voltage by interpolating input voltages applied to the plurality of input differential pairs. The first selection circuit selects the input voltages applied to the plurality of input differential pairs from reference voltages according to the digital data. The compensation unit suppresses a fluctuation in a transient variation characteristic of the input voltages applied to the plurality of input differential pairs depending on a selection of the input voltages by the first selection circuit in case at least one voltage level among the reference voltages is changed.

Decoder circuit, driving circuit for display apparatus and display apparatus

To reduce the apparent effect of offset voltage by making the offset voltage spatially scattered. An operational amplifierincludes: a first differential pair having N-channel MOS transistors MNand MN; a second differential pair having P-channel MOS transistors MPand MP; an output stage having output transistors NPand MN; first and second active loadsandhaving a switch, adapted to convert differential outputs from the first and second differential pairs to a single output, respectively; first and second bias circuitsandhaving a switch, adapted to select one of two outputs of each of the first and second active loadsandhaving the switch and to determine idling current of the MPand MN, respectively; first and second switches SWand SWadapted to respectively connect an output terminal and an input terminal to one of the gates of each of the first and second differential pairs; and a terminaladapted to receive an offset cancellation signal for controlling switching functions and the switches in linkage with each other.

Operational amplifier and display device

A differential amplifier includes an input stage circuit including a first differential pair and a second differential pair which are complementary to each other; a first current mirror circuit connected with the first differential pair and configured to function as an active load; a second current mirror circuit connected with the second differential pair and configured to function as an active load; an output stage circuit having a pair of output transistors connected in series between a higher power supply and a lower power supply; an operation point setting circuit configured to set an operation point of the output transistors; and a floating constant current source connected between an input terminal of the first current mirror circuit and an input terminal of the second current mirror circuit, and configured to supply a constant current. The first current mirror circuit and the second current mirror circuit supply superimpose an output of the input stage circuit on a current corresponding to the constant current by the floating constant current source to supply to the operation point setting circuit.

Operational amplifier with less offset

A drive circuit includes a plurality of differential AB class amplifier circuits and a common bias circuit. Each amplifier circuit is configured as a voltage follower to input an analog signal and drive a data line based on the input analog signal. The common bias circuit generates a first bias signal set and a second bias signal set. Each amplifier circuit includes an N-channel differential amplifier circuit, a P-channel differential amplifier circuit that operates independently from the N-channel differential amplifier circuit, and an output stage circuit. The N-channel and P-channel differential amplifier circuits input a differential signal and output first and second output signals onto first and second output lines, respectively, based on the first bias signal set. The output stage circuit generates drive signal from the first and second output signals based on the second bias signal set and outputs the drive signal onto an output terminal.

Growing community of inventors

Kanagawa, Japan

Atsushi Shimatani