Ricoh Company, Ltd.

Tomoe Engineering Co., Ltd.

Mitsubishi Chemical Corporation

Tianma Micro-electronics Co., Ltd.

Atsushi Onodera

Koei Suzuki

Takanori Tano

Hidenori Tomono

Hiroshi Miura

Takumi Yamaga

Takao Inoue

Haruo Nakamura

Jun Ohashi

Koji Fujimoto

Keiichiro Yutani

Motoki Numata

Takayuki Isogai

Katsunori Fukuda

Keishiro Yamazaki

A wiring board includes a variable wettability layer situated on a top surface of a support board and containing a material of which a critical surface tension changes by energy given thereto. A conductive layer is situated inside a concave portion formed in the variable wettability layer. The concave portion has opposite side walls formed in tapered surfaces inclining so that a distance between the side walls is reduced toward a bottom of the concave portion in a cross-sectional shape taken along a plane perpendicular to a conducting direction of the conductive layer. Upper edges of the side walls are formed in gently curved surfaces.

Wiring board and manufacturing method thereof

A method of forming a stacked-layer wiring includes forming first wettability variable layer on a substrate using material that changes surface energy by energy application; forming first conductive layer in or on the first wettability variable layer; forming second wettability variable layer on the first wettability variable layer using material that changes surface energy by energy application; forming concave portion to become wiring pattern of second conductive layer to the second wettability variable layer while concurrently forming high surface energy area on surface exposed by forming the concave portion by changing surface energy; forming via hole by exposing a part of the first conductive layer while concurrently forming high surface energy area on surface exposed by forming the via hole by changing surface energy; and applying conductive ink to the high surface energy area to form the second conductive layer and via simultaneously.

Method of forming stacked-layer wiring, stacked-layer wiring, and electronic element

A method of manufacturing an interconnection member includes forming on a substrate a wettability changing layer containing a material in which critical surface tension is changed by giving energy; forming a depression part in the wettability changing layer by a laser ablation method using a laser of an ultraviolet region; and coating the depression part with an electrically conductive ink to form an electrically conductive part. At the same time when a pattern of the depression part is formed in the wettability changing layer, a pattern of a high surface energy area is formed as a result of the critical surface tension being changed.

Method of manufacturing interconnection member and electronic device

A disclosed laminated structure includes a wettability-variable layer containing a wettability-variable material whose surface energy changes when energy is applied thereto and including at least a high-surface-energy area having high surface energy and a low-surface-energy area having low surface energy; and a conductive layer formed on the high-surface-energy area. The high-surface-energy area includes a first area and a second area extending from the first area and having a width smaller than that of the first area.

Laminated structure, multilayer circuit board, active matrix substrate, and electronic display

A thin film transistor array is disclosed. The thin film transistor array includes plural gate electrodes formed on an insulation substrate, plural source electrodes formed above or under the gate electrodes via a gate insulation film so that the source electrodes cross the gate electrodes in a planar view, plural drain electrodes formed at corresponding positions surrounded by the gate electrodes and the source electrodes in a planar view in the same layer as that of the source electrodes, semiconductor layers formed via the gate insulation film to face the gate electrodes for forming corresponding channel regions between the source electrodes and the drain electrodes. The plural gate electrodes are linearly formed, and the channel regions are disposed to face the gate electrodes.

Thin film transistor array and displaying apparatus

A multiple-layer wiring substrate having a first conductive layer; an interlayer insulating layer; and a second conductive layer is disclosed, wherein the interlayer insulating layer includes a material whose surface energy is changed by receiving energy, and has a first region which does not include a contact hole and a second region which is formed such that its surface energy is higher than that of the first region, wherein a region within the contact hole of the first conductive layer has surface energy which is higher than surface energy of the second region of the interlayer insulating layer, and wherein the second conductive layer is formed by laminating, wherein the second conductive layer is in contact with the second region of the interlayer insulating layer along the second region, and is connected to the first conductive layer via the contact hole.

Multi-layer wiring substrate, active matrix substrate, image display apparatus using the same, and multi-layer wiring substrate manufacturing method

A method for manufacturing a laminated structure includes a step of supplying a droplet of a functional fluid selectively to at least a first region of a high surface energy area formed in a wettability variable layer of the laminated structure. In the step, the droplet is supplied by inkjet printing, and a center position of the droplet is determined in such a manner as to satisfy both Equations (1) and (2) below:&#x3c;&#xb1;(22&#x3b1;)/2 (here,2+2&#x3b1;) &#x2003;&#x2003;(1)&#x3c;&#xb1;(&#x2212;2&#x3b1;)/2 (here,2+2&#x3b1;) &#x2003;&#x2003;(2),where X is a distance between a center position of the first region and the center position of the droplet, D is a diameter of the droplet when travelling, &#x3b1; is variation in a landing position of the droplet, L is width of the first region, and S is a gap between the first and the second regions.

Laminated structure, multilayer wiring board, active matrix substrate, image display apparatus, and method for manufacturing laminated structure

An organic transistor array includes gate electrodes provided on a substrate, source and drain electrodes provided above or below the gate electrodes via a gate insulator layer, and an organic semiconductor layer opposing the gate electrodes via the gate insulator layer, and forming a channel region between mutually adjacent source and drain electrodes. The organic transistor array in a plan view is sectioned into sections each forming a single pixel, and each section has a closest packed structure.

Organic transistor array, display device and method of fabricating display device

A horizontal centrifugal separator is configured such that a groove formed along a joint surface between an upper casing and a lower casing constituting the casing is outwardly bent near an opening of the casing, and that an elastic sealing member is disposed in the groove and an end portion thereof abuts against a sealing surface provided on a ring member which is provided so as to surround the outer circumference of the opening of the casing and is pressed against the casing. In this case, surface sealing is constituted by the end portion of the elastic sealing member and the sealing surface of the ring member. In this manner, the hermeticity can be improved without using a sealing member having a complicated structure.

Horizontal centrifugal separator in which the hermeticity of a casing is improved by using a sealing element having a simple structure

A laminated structure includes a wettability variable layer formed on a substrate, including a material whose critical surface tension varies by receiving energy so that high and low surface energy regions are formed; a conductive layer formed in one of the high surface energy regions; and an insulating layer formed in such a manner as to cover the conductive layer, wherein another one of the high surface energy regions is formed in such a manner as to surround a periphery of a circuit formation region in which a plurality of the conductive layers are formed; and the insulating layer is formed in such a manner as to also cover the another one of the high surface energy regions so that an adhesive guard ring region is formed between the wettability variable layer and the insulating layer.

Laminated structure and image display device

A laminate structure is disclosed that has a region having high surface free energy and a region having low surface free energy that are well separated, has high adhesiveness between an underlying layer and a conductive layer, and can be formed easily with low cost. The laminate structure includes a wettability-variable layer including a first surface free energy region of a first film thickness and a second surface free energy region of a second film thickness, and a conductive layer formed on the second surface free energy region of the wettability-variable layer. The second film thickness is less than the first film thickness and the surface free energy of the second surface free energy region is made higher than the surface free energy of the first surface free energy region by applying a predetermined amount of energy on the second surface free energy region.

Laminate structure, electronic device, and display device

A disclosed laminated structure includes a wettability variable layer containing a wettability variable material whose surface energy changes when energy is applied thereto and including at least a high surface energy area having high surface energy and a low surface energy area having low surface energy; and a conductive layer disposed on the high surface energy area. The conductive layer includes a first high surface energy area, a second high surface energy area smaller in width than the first high surface energy area, and a third high surface energy area smaller in width than the second high surface energy area. The first high surface energy area and the second high surface energy area are connected by the third high surface energy area.

Laminated structure, forming method of the same, wiring board, matrix substrate and electronic display apparatus

Method for forming a laminated structure having a wettability-variable layer

A screen bowl type centrifugal separator which can not only eliminate the problem of the productivity being lowered resulting from the occurrence of clogging with the crystals in the screen part, but also minimize the amount of leakage of the object to be treated in the screen part. Inside of the hub () of the screw conveyor (), a cleaning liquid receiving part () which receives the cleaning liquid for the cleaning nozzle () is provided, and further, in the cleaning liquid receiving part (), a residual layer crystal cleaning liquid receiving part () which receives the cleaning liquid for cleaning the residual layer object to be treated in the screen part () is provided, being partitioned independently of the inside of the cleaning liquid receiving part (). The cleaning liquid which has been supplied to the inside of the residual layer crystal cleaning liquid receiving part () is jet spouted directly toward the residual layer object to be treated from the outer circumferential edge of the flight () through the residual layer crystal cleaning liquid path provided along the direction of the helix of the flight (), with no relation to said cleaning liquid receiving part ().

Growing community of inventors

Tokyo, Japan

Atsushi Onodera