Kioxia Corporation

Kabushiki Kaisha Toshiba

Hitachi, Ltd.

Toshiba Memory Corporation

Atsushi Kondo

Akihisa Fujimoto

Katsuyoshi Watanabe

Taku Nishiyama

Noriya Sakamoto

Toshitada Saito

Jun Sato

Taku Kato

Akihiro Kasahara

Hiroyuki Sakamoto

Shinichi Matsukawa

Akira Miura

Hiroshi Suu

Makoto Aoki

Masaomi Teranishi

Hiroshi Yokouchi

Kazuhiro Oyama

Ryu Gemba

Naoki Haramai

Ryo Yonezawa

Hideki Kawamura

According to one embodiment, there is provided a memory card including a first surface, a second surface, and 1to Nterminal groups. The first surface includes first to Nrows, where N is an integer of two or greater. The second surface faces the opposite side from the first surface. The 1to Nterminal groups are placed in the first to Nrows. The 1terminal group includes terminals to which differential clock signals are assigned, terminals to which single-ended signals are assigned, and a terminal to which a first power supply voltage is assigned. Kterminal group, where K is an integer no smaller than two and no greater than N, includes terminals to which differential data signals are assigned.

Memory card with multiple modes, and host device corresponding to the memory card

According to one embodiment, a semiconductor memory device includes a housing and terminals. The housing has a first end edge extending in a first direction and a second end edge opposite to the first end edge. The terminals include signal terminals and include first terminals, second terminals, and third terminals. The first terminals are arranged in the first direction at a position close to the first end edge. The second terminals are arranged in the first direction with intervals at a position closer to the first end edge than the second end edge. The first plurality of terminals are closer to the first end edge than the second plurality of terminals are. The third terminals are arranged in the first direction with intervals at a position closer to the second end edge than the first end edge.

Semiconductor memory device

According to one embodiment, when a current consumption class supported by a removable memory device is another current consumption class different from a first current consumption class with a largest current consumption value among plural types of current consumption classes, the first current consumption value consumed from a first power by the removable memory device is smaller than or equal to a third permissible current value for a first power defined in the other current consumption class; and a second current consumption value consumed from a second power by the removable memory device is smaller than or equal to a fourth permissible current value for the second power defined in the other current consumption class.

Removable memory device

According to one embodiment, an information processing apparatus includes a connecting portion connectable to a removable memory device and a power supply circuit configured to apply a first voltage and a second voltage to the removable memory device. When the removable memory device is connected to the connecting portion, one of a pair of first feedback wires is electrically connected to one of the first power supply terminals to which the first voltage is applicable, and the other of the pair of first feedback wires is electrically connected to one of the power supply ground terminals connectable to a ground level, the power supply circuit is configured to control the first voltage, based on a voltage between the pair of first feedback wires.

Information processing apparatus

According to one embodiment, an information processing apparatus includes a connector into which a first-type semiconductor storage device operating with n types of power supply voltages or a second-type semiconductor storage device operating with m types of power supply voltages less than the n types of power supply voltages is capable of being placed. The apparatus checks whether or not a notch is formed at a predetermined position of a semiconductor storage device placed into the connector, and supplies the m types of power supply voltages to the semiconductor storage device when the notch is formed at the predetermined position.

Information processing apparatus, information processing system, and semiconductor storage device

According to one embodiment, a memory device includes a first nonvolatile memory die, a second nonvolatile memory die, a controller, and a first temperature sensor and a second temperature sensor incorporated respectively in the first nonvolatile memory die and the second nonvolatile memory die. The controller reads temperatures measured by the first and second temperature sensors, from the first and second nonvolatile memory dies. When at least one of the temperatures read from the first and second nonvolatile memory dies is equal to or higher than a threshold temperature, the controller reduces a frequency of issue of commands to the first and second nonvolatile memory dies or a seed of access to the first and second nonvolatile memory dies.

Temperature sensor management in nonvolatile die-stacked memory

Integrated circuit card

A memory card includes a first surface, a second surface, and 1to Nterminal groups. The first surface includes first to Nrows, wherein N is an integer of two or greater. The second surface faces the opposite side from the first surface. The 1to Nterminal groups are placed in the first to Nrows. The 1terminal group includes terminals to which differential clock signals are assigned, terminals to which single-ended signals are assigned, and a terminal to which a first power supply voltage is assigned. Kterminal group, wherein K is an integer no smaller than two and no greater than N, includes terminals to which differential data signals are assigned.

Integrated circuit built-in card

Growing community of inventors

Yokohama, Japan

Atsushi Kondo