Hitachi, Ltd.

Atsushi Itoh

Tsutomu Sunaga

Hiroki Yamashita

Masahito Sonehara

Katsuhiro Fujiwara

Takayuki Oshiga

Toshiro Kasahara

Tatsuhiro Aida

Akio Koyama

Tsurumasa Matsushita

Mitsusuke Okamura

The power supply-voltage dependency of a current source current is reduced and the power supply voltage is lowered. The invention includes an emitter-coupled logic circuitand a reference-voltage generating circuitfor generating a reference voltage VCSC for controlling a drain current (=current source current ICS) of a constant current-supplying n-type MOS transistorThe emitter-coupled logic circuitcomprises a current switch made up of a pair of emitter-coupled bipolar transistorsanda constant current-supplying n-type MOS transistorthat is connected in series with the current switch, and resistor meansandconnected in series with the bipolar transistorsandindividually for obtaining an output voltage. The reference-voltage generating circuitcomprises an n-type MOS transistora bipolar transistorwhich determines the drain voltage of the n-type MOS transistorand a control circuitfor controlling the drain current of the n-type MOS transistor

Logic circuit

In a sequence program constructed by forming a ladder diagram on a display screen, an element corresponding to a minimum unit of the ladder diagram is arranged by a symbol element and a character element. Inputting and amending operations of the ladder diagram are performed by a first cursor for designating each element and a second cursor for designating the character element of the element designated by this first cursor.

Programming method and apparatus for programmable controller

A programmable controller, including at least a sequence processor, has plural memories for storing user programs which can be accessed by the same addresses from the sequence processor. The memories are selectively enabled in response to a mode signal and an access signal from the sequence processor. In this way, switching between memories enables the sequence processor to switch its processing from one user program to another without the need to transfer the user programs from one memory to another. Where an additional control processor is included in the programmable controller for updating user programs, it is possible to enable access by the sequence processor to one memory and the control processor to another memory during the same instruction cycle.

Programmable controller capable of updating a user program during

The states of the signals inputted to a programmable sequence controller or outputted from the programmable sequence controller are stored by a few scanning operations. A check is made to see if a combination of input and output signals which cannot be generated during one scanning operation in the normal operating mode exists in that memory content or not, thereby investigating causes of the occurrence of abnormalities.

Sequence control apparatus

Growing community of inventors

Fussa, Japan

Atsushi Itoh