Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Atsushi Doi

Koji Takemura

Noriyuki Nagai

Tomoyuki Nakayama

Manabu Ohnishi

Hoyeun Huh

Naoki Nojiri

Hitonobu Furukawa

Hirokazu Kitamura

Tetsuya Fuke

Hideya Kitamura

Input/output cells are formed so as to be peripherally arranged adjacent to a corner cell on a surface of a semiconductor chip, and electrode pads are formed on the respective input/output cells. The electrode pads are configured in a zigzag pad arrangement so as to form inner and outer pad arrays. However, of the electrode pads forming the inner pad array, those electrode pads in predetermined areas adjacent to the two sides of the corner cell are not disposed, such that an interconnect pattern of a carrier which is bump-bonded to the semiconductor chip and vias are prevented from becoming complex.

Semiconductor device having a pad-disposition restriction area

Semiconductor device

According to the invention, in input/output circuit portions positioned around a semiconductor chip, electrode pads are arranged above each of a plurality of input/output cells arranged in a line. The width of the electrode pads is greater than the width of the input/output cells, and thus the electrode pads cannot be arranged in a single line and are instead arranged staggered in two lines. The electrode pads of one row are arranged shifted so that they do not overlap with the internal terminals of the input/output cells, but are disposed near these internal terminals. The spacing between the electrode pads is set to a distance that is at least a set distance determined by the isolation rules of the design.

Filter device

Growing community of inventors

Osaka, Japan

Atsushi Doi