Semiconductor Energy Laboratory Co., Ltd.

Other

Atsuo Isobe

Shunpei Yamazaki

Hidekazu Miyairi

Hiroshi Shibata

Koichiro Tanaka

Akihisa Shimomura

Tatsuya Arao

Toshinari Sasaki

Chiho Kokubo

Kiyoshi Kato

Toru Takayama

Mai Akiba

Koji Dairiki

Hiromichi Godo

Masahiko Hayakawa

Toshihiko Saito

Shinya Sasagawa

Tamae Takano

Yutaka Okazaki

Kazuya Hanaoka

Junichi Koezuka

Hikaru Tamura

Aiko Shiga

Wataru Uesugi

Sachiaki Tezuka

Etsuko Fujimoto

Yoshinori Ieda

Kunihiko Fukuchi

Takehisa Hatano

Tetsuji Yamaguchi

Tomoaki Atsumi

Motomu Kurata

Akihiro Ishizuka

Hideomi Suzawa

Yutaka Shionoiri

Yasuyuki Arai

Takayuki Ikeda

Junya Maruyama

Yoshiaki Yamamoto

Keitaro Imai

Satoru Saito

Satoshi Murakami

Kosei Noda

Tomoaki Moriwaka

Naoaki Tsutsui

Yuki Hata

Yuugo Goto

Yuta Endo

Yumiko Ohno

Atsushi Miyaguchi

Munehiro Azami

Takahiko Ishizu

Kunio Hosoya

Shinji Ohno

Suguru Hondo

Hitomi Sato

Daisuke Ohgarane

Mizuho Ikarashi

Hiroyuki Miyake

Yoshiyuki Kurokawa

Hideto Ohnuma

Osamu Nakamura

Yuichi Sato

Takuro Ohmaru

Takashi Hamada

Yuto Yakubo

Masaharu Nagai

Saishi Fujikawa

Ryota Imahayashi

Shinobu Furukawa

Tomoko Tamura

Susumu Okazaki

Sho Nagamatsu

Suguru Ozawa

Takashi Shingu

Kouki Inoue

Fumiko Terasawa

Jun Koyama

Yoshifumi Tanada

Junpei Momo

Seiichi Yoneda

Koichiro Kamata

Keiji Sato

Yuji Iwaki

Tetsuya Kakehata

Yuhei Sato

Tetsunori Maruyama

Naoto Yamade

Mayumi Yamaguchi

Tsutomu Murakawa

Tomokazu Yokoi

Yasuyuki Takahashi

Satoshi Shinohara

Hiroaki Honda

Takeshi Shichi

Keiko Saito

Tomohiko Sato

Masumi Nomura

Noriko Harima

Akihiko Koura

An arithmetic device and an electronic device having small power consumption is provided. An arithmetic device and an electronic device capable of high-speed operation is provided. An arithmetic device and an electronic device capable of suppressing heat generation is provided. The arithmetic device includes a first arithmetic portion and a second arithmetic portion. The first arithmetic portion includes a first CPU core and a second CPU core. The second arithmetic portion includes a first GPU core and a second GPU core. The CPU cores each have a power gating function and each include a first data retention circuit electrically connected to a flip-flop. The first GPU core includes a second data retention circuit capable of retaining an analog value and reading out the analog value as digital data of two or more bits. The second GPU core includes a third data retention circuit capable of retaining a digital value and reading out the digital value as digital data of one bit. The first to third data retention circuits each include a transistor including an oxide semiconductor and a capacitor.

Arithmetic device and electronic device

A retention circuit provided in a logic circuit enables power gating. The retention circuit includes a first terminal, a node, a capacitor, and first to third transistors. The first transistor controls electrical connection between the first terminal and an input terminal of the logic circuit. The second transistor controls electrical connection between an output terminal of the logic circuit and the node. The third transistor controls electrical connection between the node and the input terminal of the logic circuit. A gate of the first transistor is electrically connected to a gate of the second transistor. In a data retention period, the node becomes electrically floating. The voltage of the node is held by the capacitor.

Logic circuit, processing unit, electronic component, and electronic device

The present invention is characterized in that by laser beam being slantly incident to the convex lens, an aberration such as astigmatism or the like is occurred, and the shape of the laser beam is made linear on the irradiation surface or in its neighborhood. Since the present invention has a very simple configuration, the optical adjustment is easier, and the device becomes compact in size. Furthermore, since the beam is slantly incident with respect to the irradiated body, the return beam can be prevented.

Laser irradiation method and laser irradiation device and method of manufacturing semiconductor device

Provided is a semiconductor device which has low power consumption and can operate at high speed. The semiconductor device includes a memory element including a first transistor including crystalline silicon in a channel formation region, a capacitor for storing data of the memory element, and a second transistor which is a switching element for controlling supply, storage, and release of charge in the capacitor. The second transistor is provided over an insulating film covering the first transistor. The first and second transistors have a source electrode or a drain electrode in common.

Semiconductor device

A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.

Semiconductor device and semiconductor device production system

It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

Semiconductor device and method of manufacturing the same

Stable electric characteristics and high reliability are provided to a miniaturized and integrated semiconductor device including an oxide semiconductor. In a transistor (a semiconductor device) including an oxide semiconductor film, the oxide semiconductor film is provided along a trench (groove) formed in an insulating layer. The trench includes a lower end corner portion having a curved shape with a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm, and the oxide semiconductor film is provided in contact with a bottom surface, the lower end corner portion, and an inner wall surface of the trench. The oxide semiconductor film includes a crystal having a c-axis substantially perpendicular to a surface at least over the lower end corner portion.

Semiconductor Device

Growing community of inventors

Kanagawa, Japan

Atsuo Isobe