Fujitsu Corporation

Atsuo Hara

Takashi Miura

Akihide Otonari

Kyoko Tadaki

Yusuke Hida

An information processing method implemented by a computer, the information processing method includes: acquiring an image group generated by imaging a data group according to each of a plurality of imaging methods; for each of the acquired image groups, calculating a score of the imaging method used to generate the image group, based on distribution of a first feature value group in a feature value space, and distribution of a second feature value group in the feature value space, the first feature value group being a plurality of feature values output when the image group is input to a trained model outputting feature values corresponding to input images, the second feature value group being a plurality of feature values output when a reference image group is input to the trained model; and outputting the score of the imaging method, the score being calculated for each of the image groups.

Information processing method, information processing apparatus, and non-transitory computer-readable storage medium for storing information processing program of scoring with respect to combination of imaging method and trained model

A device for generating k-bit parallel pseudo-random data includes 'n' registers, from the first through the n-th registers ('n' is an integer not less than 3), and &#x201c;k&#x201d; exclusive-OR gates, from the first through the k-th exclusive-OR gates (&#x201c;k&#x201d; is an integer not less than 2). An output of the m-th register is input to the (m+k)th register (&#x201c;m&#x201d; is an integer between 1 and (n&#x2212;k)). Outputs of the first through the (k&#x2212;1)th exclusive-OR gates are respectively input to the second through the k-th exclusive-OR gates. An output of the first register is input to the first exclusive-OR gate. The outputs of the first through the k-th exclusive-OR gates are respectively input to the k-th through the first registers. Outputs of &#x201c;k&#x201d; registers, from the (n&#x2212;k+1)th through the n-th registers are respectively input to the k-th through the first exclusive-OR gates, and also extracted as the k-bit parallel pseudo-random data.

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Chikushino, Japan

Atsuo Hara