Kabushiki Kaisha Toshiba

Atsuko Iida

Kazuhiko Itaya

Yutaka Onozuka

Tadahiro Sasaki

Kazuhide Abe

Yasushi Shinjo

Takeshi Gotanda

Wu Mei

Norihiro Yoshinaga

Haruhi Oh-Oka

Yoshihiko Nakano

Hiroshi Yamada

Hideyuki Nakao

Kenji Todori

Hideki Nukada

Nobuto Managaki

Yuichi Yamamoto

Mitsunaga Saito

Haruhi Oooka

Takeshi Miyagi

Shigehiko Mori

Yoshizumi Sato

Hyangmi Jung

Hiroshi Odaira

Masayuki Saito

Takashi Sasaki

Noriko Yamamoto

Hideo Aoki

Tatsuro Uchida

Takashi Kawakubo

Takashi Ishigami

Chiaki Takubo

Yasuyuki Hotta

Akira Yoshioka

Hidetoshi Fujimoto

Yumi Fukuda

Akira Kinno

Iwao Mitsuishi

Shouhei Kousai

Yasunobu Saito

Toshiyuki Naka

Tetsuya Ohno

Takaaki Yasumoto

Rumiko Hayase

Shigeru Matake

Mituo Kawai

Tamio Saito

Miki Mori

Naoko Yamaguchi

Naoko Yanase

Yukio Kizaki

Takako Motai

Norio Yoshikawa

Masaki Katsura

Norio Ozawa

Miki Yumoto

Kunio Yoshihara

Masaru Furukawa

Junji Wadatsumi

Reiji Nishikawa

Toshio Sudo

Shingo Masuko

Takeshi Uchihara

Tasuku Ono

Yukako Murakami

Hirosi Ohdaira

Shigeyuki Oe

Yasunari Yagi

A catalyst laminate includes a plurality of catalyst layers containing at least one of a noble metal and an oxide of the noble metal and at least one of a non-noble metal and an oxide of the non-noble metal, including:

Catalyst laminate, membrane electrode assembly, electrochemical cell, stack, water electrolyzer, and hydrogen utilizing system

A catalyst of an embodiment includes a porous structure including aggregates of particles containing Ru and metal atoms M different from Ru. The particles are a metal oxide. A metal atom ratio of the metal atom M in a surface region of the porous structure is higher than that of the metal atom M in the porous structure as a whole.

Catalyst, anode, membrane electrode assembly, water electrolysis cell, stack, water electrolyzer, and hydrogen utilizing system

An electrode includes a base material, and a catalyst layer provided on the base material, the catalyst layer including a plurality of catalyst units having a porous structure. The catalyst layer has a first catalyst layer provided near the base material, the first catalyst layer including a plurality of the catalyst units dispersed at a first dispersion degree. The catalyst layer has a second catalyst layer provided above the first catalyst layer, the second catalyst layer including a plurality of the catalyst units dispersed at a second dispersion degree. The second dispersion degree is different from the first dispersion degree.

Electrode, membrane electrode assembly, electrochemical cell, and stack

A method of manufacturing a photoelectric conversion device of an embodiment includes: forming a layer on a substrate; and drying this layer. The layer contains a p-type semiconductor, an n-type semiconductor, and a compound represented by the following formula (1). The layer is dried under pressures of 100 Pa or less and substrate temperatures of 40 to 200&#xb0; C.R&#x2014;(CH)&#x2014;R&#x2003;&#x2003;(1)

Photoelectric conversion device and method of manufacturing the same

A photoelectric conversion device includes: an element substrate having a first electrode, a photoelectric conversion layer, and a second electrode, the photoelectric conversion layer being provided above the first electrode and performing charge separation by energy of irradiated light, and the second electrode being provided above the photoelectric conversion layer; a counter substrate facing the element substrate; and a sealing layer provided between the element substrate and the counter substrate. The element substrate, the counter substrate, and the sealing layer define a sealing region sealing the photoelectric conversion layer. The element substrate further has: an impurity detection layer in contact with the second electrode inside the sealing region and causing chemical reaction with an impurity containing at least one of oxygen and water; and a third electrode in contact with the impurity detection layer and extending to the outside of the sealing region.

Photoelectric conversion device

A solar cell module according to an embodiment includes: a light transmissive first substrate; a second substrate; at least one cell array disposed between the first substrate and the second substrate, the cell array including a plurality of cells arranged, each of the cells including a first electrode disposed on the first substrate, an organic photoelectric conversion film disposed on the first electrode, and a second electrode disposed on the organic photoelectric conversion film; a plurality of light transmissive partition walls disposed at portions on the first substrate, the portions being located between adjacent ones of the cells and at both end portions of the cell array; and a first resin film disposed between the second substrate and each of the cells between adjacent ones of the partition walls, the cells being connected in series.

Solar cell module

An electrode of an embodiment includes a base material, and a catalyst layer provided on the base material and having a porous structure. When a sum of heights of all peaks belonging to Ir oxide is I0, the height of a peak of IrO(110) is I1, and the height of a peak of IrO(211) is I2, a ratio of (I1+I2)/I0, which is a ratio of spectra obtained by X-ray diffraction measurements using K&#x3b1; rays of Cu in the catalyst layer, is 50% or more and 100% or less in a range of a diffraction angle of 20 degrees or more and 70 degrees or less.

According to one embodiment, a photoelectric conversion element includes a first electrode, a second electrode, a photoelectric conversion layer and a first layer. The photoelectric conversion layer is provided between the first electrode and the second electrode. The first layer is provided between the first electrode and the photoelectric conversion layer. The first layer includes at least a first metal oxide. The first layer has a plurality of orientation planes. At least one of the orientation planes satisfies the relationship L&#x3e;L, where Lis a length of the one of the plurality of orientation planes, and Lis a thickness of the first layer along a first direction. The first direction is from the first electrode toward the second electrode.

Photoelectric conversion element and method for manufacturing the same

A wiring board of an embodiment includes a through via, a first insulating film disposed around the through via, a second insulating film disposed around the first insulating film, a third insulating film disposed around the second insulating film and a resin disposed around the third insulating film. The resin includes fillers. The second insulating film has a relative permittivity lower than a relative permittivity of the first insulating film. The third insulating film has a relative permittivity higher than a relative permittivity of the second insulating film.

Wiring board and method of manufacturing the same

An antenna device of the present embodiment includes: a first conductive layer connected to a ground potential, a semiconductor device provided above the first conductive layer, a second conductive layer provided above the semiconductor device, a first via connecting the second conductive layer and the first conductive layer, a third conductive layer provided above the second conductive layer, a second via passing through the first opening, and an antenna provided above the third conductive layer. A dielectric is provided between the second conductive layer and the semiconductor device, between the third conductive layer and the second conductive layer, and between the antenna and the third conductive layer. The second conductive layer includes a first opening. The second via connects the third conductive layer and the first conductive layer.

Antenna device

A connection member according to an embodiment includes a dielectric material, a penetrating via penetrating through the dielectric material, a first metal plane provided in the dielectric material, the first metal plane being perpendicular to an extension direction of the penetrating via, the first metal plane crossing the penetrating via, and a second metal plane provided n or on the dielectric material in parallel with the extension direction of the penetrating via, the second metal plane connected to the first metal plane.

Connection member, semiconductor device, and stacked structure

A reconfigured wafer of resin-encapsulated semiconductor packages is obtained by supporting with a resin, thereafter, a grinding process is performed on top and backside surfaces to expose only a bump interconnection electrode on a surface of a semiconductor chip. Further, a chip-scale package is obtained by a dicing process along a periphery of the chip.

Semiconductor package including a plurality of chips

A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode.

Semiconductor device

A semiconductor device according to an embodiment has: a semiconductor substrate; an acoustic resonator formed on the semiconductor substrate, having a semiconductor layer including impurity electrically isolated from the substrate by depletion layer and configured to resonate at a predetermined resonance frequency based on acoustic standing wave excited in the semiconductor layer; a temperature detector formed on the semiconductor substrate and configured to detect temperature of the semiconductor substrate; a calculating unit formed on the semiconductor substrate and configured to perform calculation of temperature compensation based on the temperature detected by the temperature detector, kind of the impurity and concentration of the impurity; and a controller formed on the semiconductor substrate and configured to control the resonance frequency based on a result of the calculation by the calculating unit.

Semiconductor device with a resonator using acoustic standing wave excited in semiconductor crystal

Method of fabricating chip scale package

Growing community of inventors

Yokohama, Japan

Atsuko Iida