Mitsubishi Denki Kabushiki Kaisha

Other

Atsuhiro Fujii

Masazumi Matsuura

Hideki Genjo

Hideo Kotani

Shigeo Nagao

Kazuo Kobayashi

Yoshinori Okumura

Hiroji Ozaki

Hiroshi Ohnishi

Wataru Wakamiya

Masao Nagatomo

Takayuki Matsukawa

Isao Tottori

Seiichi Mimura

Toshihiko Minami

Yasuhiko Horie

Fusao Shimizu

A carrier shape measurement device includes: a stage which supports a carrier which is to be a subject of measurement; and a measurement section which measures a shape of the carrier, and the stage comprises kinematic coupling pins to support the carrier by a kinematic coupling.

Carrier shape measurement device

An ion generator vessel can be filled up with raw material gas containing a specific gas component. The ion generator vessel can be irradiated with a laser beam from a laser oscillator. Due to the beam which is applied into the ion generator vessel, only the specific gas component is selectively excited by multi-photon absorption, to generate ions. Thus, a semiconductor substrate can be inhibited from damage in ion implantation, and processability such as the throughput etc. can be improved.

Ion implantation apparatus, ion implantation method and semiconductor

It is an object to improve the corrosion resistance of a CVD jig made of quartz to prevent exfoliation of a film attached on the surface to prevent dust. The surface of a quartz CVD jig is burned with an arc plasma torch 14 so that the OH concentration in the quartz surface remains under 30 ppm.

Jig for use in CVD and method of manufacturing jig for use in CVD

A method of treating a substrate with substantially equal flow rates of treatment gases in a treatment chamber containing the substrate. Because the times during which the treatment gases pass through pipes are controlled, even when the flow rates of the treatment gases differ appreciably, the impurity concentration in a film near the interface between the substrate and the film reaches a desired concentration. Also, when the times during which the treatment gases pass through the pipes are short, the treatment gases are unlikely to adhere to the walls of the pipes. It is thus possible to reduce the frequency of dummy runs.

Method of treating a substrate wherein the flow rates of the treatment

The method of forming an interlayer insulating film insulating first and second layers of conductor patterns in a semiconductor device includes the steps of preparing a reaction gas including at least ozone and silicon alkoxide, wherein the ratio of ozone with respect to silicon alkoxide is adjusted to be not less than 5 within the reaction gas, and forming an insulating film by CVD reacting the reaction gas at atmospheric pressure at the temperature of 350.degree. C.- 450.degree. C., whereupon the interlayer insulating film includes at least the insulating film formed by atmospheric pressure CVD reaction.

Method of manufacturing semiconductor device including interlaying

The method of forming an interlayer insulating film insulating first and second layers of conductor patterns in a semiconductor device includes the steps of preparing a reaction gas including at least ozone and silicon alkoxide, wherein the ratio of ozone with respect to silicon alkoxide is adjusted to be not less than 5 within the reaction gas, and forming an insulating film by CVD reacting the reaction gas at atmospheric pressure at the temperature of 350.degree. C.-450.degree. C., whereupon the interlayer insulating film includes at least the insulating film formed by atmospheric pressure CVD reaction.

Semiconductor device including interlayer insulating film

A method of manufacturing a semiconductor device in which an element is flattened by improving a technique of forming an interlayer insulating film. A thick insulating film having a film thickness necessary for a convexo-concave pattern to be flattened is deposited on a semiconductor substrate comprising the convexo-concave pattern of an element, a wiring and the like. Then, the thick insulating film is etched until it becomes a predetermined film thickness to form an interlayer insulating film having a predetermined film thickness from said thick insulating film. At this time, since acid and water are attached on the surface of the interlayer insulating film, a new film is formed on the surface of the interlayer insulating film to cover this water and acid. Then, a resist pattern having a desired configuration is formed on this new film. A contact hole is formed on the interlayer insulating film using this resist pattern. Thereafter, a wiring pattern electrically connected to the element is formed on the interlayer insulating film through the contact hole. According to this method, since the acid and water attached on the interlayer insulating film are covered with the new film, the adhesion between the interlayer insulating film and the resist is improved. As a result, the contact hole can be opened reliably, whereby the element is surely connected to the wiring pattern and a semiconductor device can be provided with high reliability.

Method of manufacturing a semiconductor device with a planar interlayer

An ozone generating method for increasing the quantity of ozone produced by a silent discharge in high purity oxygen includes mixing nitrogen with the high purity oxygen in a predetermined ratio. The nitrogen gas is a catalyst for stable and highly efficient ozone generation from a high purity oxygen source.

Ozone generating method

A semiconductor device having a plurality of conductive layers is disclosed. The device has first level conductors (9) formed spaced apart on a semiconductor substrate (1). The semiconductor substrate (1) is provided with impurity diffusion regions (11) in its major surface between adjacent first level conductors (9). A triple layer insulation formed of a pair of oxide layers (12, 14) and an silicon oxide layer (13) sandwiched between the oxide layers (12, 14) covers the semiconductor substrate (1) and the first level conductors (9) thereon. At least one contact hole (15) is formed to extend through the triple layer insulation to either the impurity diffusion region (11) in the semiconductor substrate (1) or the first level conductor (9) on the semiconductor substrate (1). A second level conductor (16, 17) is provided on the triple layer insulation and on the inner surrounding wall of the contact hole (15). Each of the three insulating layers in the triple layer insulation has its hole-defining surface exposed at the contact hole (15) flush with or displaced laterally into the contact hole (15) away from a corresponding hole-defining exposed surface of the next overlying insulating layer.

Growing community of inventors

Hyogo, Japan

Atsuhiro Fujii