Motorola Corporation

Atif A Meraj

Jose E Korneluk

Raul Salvi

Wayne W Ballantyne

Enrique Ferrer

David J Graham

Keith Andrew Tilley

Mark A Goldberg

Anil N Patel

William J Wingfield

Kristi A Haverkamp

A frequency management scheme for a hybrid cellular/GPS or other device generates a local clock signal for the communications portion of the device, using a crystal oscillator or other part. The oscillator output may be corrected by way of an automatic frequency control (AFC) circuit or software, to drive the frequency of that clock signal to a higher accuracy. Besides being delivered to the cellular or other communications portion of the hybrid device, the compensated clock signal may also be delivered to a comparator to measure the offset between the cellular oscillator and the GPS oscillator. The error in the cellular oscillator may be measured from the AFC operation in the cellular portion of the device. An undershoot or overshoot in the delta between the two oscillators may thus be deduced to be due to bias in the GPS oscillator, whose value may then be determined. That value may then be used to adjust Doppler search, bandwidth or other GPS receiver characteristics to achieve better time to first fix or other performance characteristics.

System and method for frequency management in a communication device having a positioning device

A crystal reference (,) comprises a crystal element (,) integrally housed with a memory device (,), and is coupled to the memory device through an anti-resonant network (,). The network is designed such that it presents a high impedance at the natural frequency of the crystal element. Temperature performance information for the particular crystal element is stored in the memory device, and is accessed via terminal (,) using a single wire interface protocol.

Crystal reference and oscillator circuit using same

A DC offset correction loop (,) utilizes a sign bit generator (,), binary search stage (,), and a digital-to-analog converter (,) in its feedback path to correct for DC offsets at the input of a gain stage (,). When a correction value is obtained, it is applied and held (,) to compensate for the DC offset. When a programming event occurs (,), such as detecting an increase in DC offset beyond a threshold, detecting a significant temperature change, or passage of time, a new DC offset correction cycle is initiated.

Method and apparatus for settling and maintaining a DC offset

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Plantation, FL, United States of America

Atif A Meraj