Micron Technology Incorporated

Ashwin Panday

Si-Woo Lee

Sanjeev Sapra

Silvia Borsari

Mohd Kamran Akhtar

Guangjun Yang

Jerome A Imonigie

Vinay Nair

Zhiqiang Xie

Devesh Dadhich Shreeram

Kangle Li

Adriel Jebin Jacob Jebaraj

Brian J Kerley

Some embodiments include an integrated assembly having digit-line-contact-regions between pairs of capacitor-contact-regions. The capacitor-contact-regions are arranged with six adjacent capacitor-contact-regions in a substantially rectangular configuration. Conductive plugs are coupled with the capacitor-contact-regions. Conductive redistribution material is coupled with the conductive plugs. Upper surfaces of the conductive redistribution material are arranged in a substantially hexagonal-close-packed configuration. Digit lines are over the digit-line-contact-regions. Insulative regions are between the digit lines and the conductive plugs. The insulative regions contain voids and/or low-k dielectric material. Capacitors are coupled with the upper surfaces of the conductive redistribution material.

Integrated memory with redistribution of capacitor connections, and methods of forming integrated memory

Methods, apparatuses, and systems related to forming a recess in a semiconductor structure are described. An example method includes etching the semiconductor structure using an elevated temperature dilution of acid and water. The method further includes etching the semiconductor structure using a room temperature wet etch of acid and water and a surface modification chemistry.

Semiconductor recess formation

Growing community of inventors

Boise, ID, United States of America

Ashwin Panday