Qualcomm Incorporated

Ashutosh Shrivastava

Dhamim Packer Ali

Mamta Desai

Yanru Li

Azzedine Touzni

Eugen Pirvu

Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of operating a system-on-chip (SoC). The method includes selecting a CPU core of a plurality of CPU cores of the SoC to boot the SoC based on information indicative of the quality of the plurality of CPU cores stored on the SoC. The method includes running boot code on the selected CPU.

Selectable boot CPU

Systems and methods are disclosed for providing stack overflow protection on a system on chip via a hardware write-once register. An exemplary embodiment of an system on chip comprises a hardware write-once register, a boot processor, and one or more processor subsystems. The boot processor is configured to execute a read only memory (ROM) image which initializes the hardware write-once register with a first numeric value in response to the system on chip being powered on. The one or more processor subsystems have an associated software image configured to use the first numeric value in the hardware write-once register as a stack canary value to combat stack overflow attacks.

Secure stack overflow protection via a hardware write-once register

A system and method for patching a boot sequence in a read-only memory. Patch instances are provided in an addressable memory. The patch instances are initially empty. The read-only memory includes a process that dynamically vectors to identified locations in a set of addressable memory locations in the addressable memory. Thereafter, the process returns to the next subsequent instruction following the patch instance. As corrections are required, the one or more patch instances are populated with one or more respective patches. The boot sequence is modified by inserting one or more patch indicators located where patches might need to be applied after a system-on-chip (SoC) is embodied in firmware. The patches, when defined, are populated with at least an encoded instruction type and an address. Accordingly, a patch is enabled in no more than three words.

Growing community of inventors

San Diego, CA, United States of America

Ashutosh Shrivastava