Intel Corporation

Ashutosh J Bakhle

Derek L Davis

Bradley C Aldrich

Sasi K Kumar

Randell R Dunton

Briefly, in accordance with one embodiment of the invention, a digital camera includes: a digital imaging array including a plurality of pixels, and image processing circuitry to process the digital pixel output signals produced by the imaging array. The imaging processing circuitry is adapted to process saturated digital pixel output signals differently from non-saturated digital pixel output signals. In accordance with another embodiment of the invention, at least one integrated circuit includes image processing circuitry. The processing circuitry is adapted to process digital pixel output signals produced by a digital imaging array. The image processing circuitry is further adapted to process saturated digital pixel output signals differently from non-saturated digital pixel output signals. In accordance with yet one more embodiment of the invention, a method of processing digital pixel output signals produced by a digital imaging array includes processing saturated digital pixel output signals differently from non-saturated digital pixel output signals.

Method and apparatus for processing digital pixel output signals

A cryptography unit having a cipher unit and a hash unit coupled in parallel for simultaneous ciphering and hashing. The cipher unit implements a cipher algorithm that operates on a data block having a first predetermined size M. The hash unit implements a hash algorithm on a data block having a second predetermined size N. Buffers of a size Q, where Q is an integer multiple of M and N, are employed to receive the input data into the present invention. A security unit that ensures that the cipher unit and the hash unit operate on the same data block of size Q is also provided.

Method and apparatus for integrated ciphering and hashing

Elimination of dark fixed pattern noise (DFPN) for tethered CMOS sensor-based digital video cameras is supported by supplying and maintaining a host-based dark image cache. Since the camera is tethered to a host computer system such as a PC, it takes advantage of the storage and processing capabilities of the host to manage the cache. By using a dark image cache for updating of the currently applicable dark image for DFPN cancellation processing, operation of the camera shutter for acquiring dark images is dramatically reduced, thereby using less system resources such as power, and increasing the MTBF of the electromechanical devices such as the camera shutter and associated controls. Dark images are obtained at different integration, gain, and temperature operating characteristics of the camera and stored in the cache. The cached dark images are referenced on the host according to a fixed, predetermined dark column of data in video frames generated by the CMOS sensor image array of the camera. The dark column data represents a portion of the CMOS sensor image array which is permanently and totally shadowed for use during DFPN cancellation processing.

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Chandler, AZ, United States of America

Ashutosh J Bakhle