Hewlett-packard Company

Ashor Kapoor

Chen-Hsi Lin

Donald L Packwood

Chi-Kwan Lau

A method of fabricating a BiCMOS device in which PMOS and NMOS transistors are formed prior to a base/emitter structure of a bipolar transistor. In forming the base/emitter structure, a blanket implant of a first impurity is introduced into a base region of a semiconductor substrate. An insulating layer is deposited and then patterned to expose a portion of the base region at an emitter window. A polysilicon layer is deposited on the insulating layer and into the emitter window. The polysilicon layer is patterned to provide the desired configuration at the emitter window, whereafter the remaining polysilicon acts as a mask for etching of the insulating layer. Thus, etching of the insulating layer is performed in a self-aligning manner. Self-alignment is also utilized in providing a base-link region and in providing a silicide layer.

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Palo Alto, CA, United States of America

Ashor Kapoor