Sun Microsystems, Inc.

3Par Inc.

3Pardata, Inc.

Hewlett-Packard Development Company, L.p.

Advanced Micro Devices Corporation

Ashok Singhal

David J Broniarczyk

Erik E Hagersten

Bjorn O Liencres

George R Cameron

Jeff Price

Robert Cypher

Sushil Thomas

Nalini Agarwal

Frederick M Cerauskis

Jeffrey A Price

Jeff A Price

Gerald Cheung

Gary R Lauterbach

Han Y Ko

Aleksandr Guzovskiy

William A Nesheim

Clement Fang

Tayung Wong

Kang S Lim

John Carrillo

Alan M Yamauchi

George C Cameron

A method is provided to allow a user on a host system to update a specific snapshot in a data storage system where the user does not have other editing privileges. The method includes (1) receiving a request to update the snapshot from the user and (2) determining from an access control list if the user is permitted to update the snapshot. If the user is permitted to update the snapshot, the method includes (3) recording parameters for a VLUN (virtual logic unit) associated with the snapshot, (4) removing the VLUN from the data storage system, (5) replacing the snapshot with a new snapshot created from a parent volume of the snapshot, (6) recreating the VLUN for the new snapshot from the recorded parameters, and (7) exporting the VLUN to the host system.

Protected user-controllable volume snapshots

A communication link protocol is provided for communicating between nodes of an interconnect system via a communication link. In one embodiment, the communication link protocol includes a direct memory access (DMA) command for writing a block of data from a local node to a remote node via the communication link; an administrative write command for writing data from a local node to registers in a remote node via the communication link for administrative purposes; a memory copy write command for writing a line of memory from a local node to a remote node via the communication link when any data is written into that line of memory; and a built in self test (BIST) command for testing the functionality of the communication link.

Communication link protocol optimized for storage architectures

A method is provided for communicating data in an interconnect system comprising a plurality of nodes. In one aspect, the method includes: issuing a command packet from a first node, the command packet comprising a respective header quadword and at least one respective data quadword for conveying a command to a second node, wherein the command is selected from a group comprising a direct memory access (DMA) command, an administrative write command, a memory copy write command, and a built in self test (BIST) command; receiving the command packet at the second node; issuing an acknowledgement packet from the second node, the acknowledgement packet comprising a respective header quadword for conveying an acknowledgement that the command packet has been received at the second node.

Method of communicating data in an interconnect system

A node controller for a data storage system having at least one node provides access to a data storage facility. The node controller is distinct from a computer-memory complex of the node. The node controller provides overall control for transferring data through the node.

Node controller for a data storage system

A method is provided for a data storage system to move data from a source logical disk (LD) region to a target LD region while the data storage system remains online to a host. The method includes determining if a region move will create excessive load so the data storage system appears offline to the host. If not, the method includes causing writes to the source LD region to be mirrored to the target LD region, causing data in the source LD region to be copied to the target LD region, blocking reads and writes to the data storage system, and flushing dirty cache in the data storage system. If flushing the dirty cache is fast so the data storage system appears online to the host, the method includes updating mappings of the virtual volume to the LD regions and resuming the reads and writes to the data storage system.

Method and apparatus for managing data storage systems

A method is provided for a data storage system to change the RAID type, the layout characteristics, and the performance characteristics of a virtual volume mapped to logical disk regions in one or more logical disks while the data storage system remains online to a host. Another method is provided for a data storage system to consolidate space in one or more logical disks mapped to a virtual volume while the data storage system remains online to a host. The one or more logical disks can be consolidated to free unused chunklet regions for use in other logical disks.

Applications for non-disruptively moving data between logical disk regions in a data storage system

A multiprocessor computer system is configured to selectively transmit address transactions through an address network using either a broadcast mode or a point-to-point mode transparent to the active devices that initiate the transactions. Depending on the mode of transmission selected, either a directory-based coherency protocol or a broadcast snooping coherency protocol is implemented to maintain coherency within the system. A computing node is formed by a group of clients which share a common address and data network. The address network is configured to determine whether a particular transaction is to be conveyed in broadcast mode or point-to-point mode. In one embodiment, the address network includes a mode table with entries which are configurable to indicate transmission modes corresponding to different regions of the address space within the node. Upon receiving a coherence request transaction, the address network may then access the table in order to determine the transmission mode, broadcast or point-to-point, which corresponds to the received transaction.

Multiprocessing system employing address switches to control mixed broadcast snooping and directory based coherency protocols transparent to active devices

A multiprocessor computer system to selectively transmit address transactions using a broadcast mode or a point-to-point mode. Either a directory-based coherency protocol or a broadcast snooping coherency protocol is implemented to maintain coherency. A node is formed by a group of clients which share a common address and data network. The address network determines whether a transaction is conveyed in broadcast mode or point-to-point mode. The address network includes a table with entries which indicate transmission modes corresponding to different regions of the address space within the node. Upon receiving a coherence request transaction, the address network may access the table to determine the transmission mode which corresponds to the received transaction. Network congestion may be monitored and transmission modes adjusted accordingly. When network utilization is high, the number of transactions which are broadcast may be reduced. Alternatively, when network utilization is low, the number of broadcasts may be increased.

Shared memory multiprocessing system employing mixed broadcast snooping and directory based coherency protocols

A data storage system includes a plurality of nodes for providing access to a data storage facility. Each node has a computer-memory complex to provide general purpose computing for the node, a node controller to control data transfers through the respective node, and a cluster memory to buffer data for the data transfers. A plurality of communication paths interconnect the nodes, with a separate communication path provided for each two nodes of the data storage system.

Data storage system

A probabilistic queue lock divides requesters for a lock into at least three sets. In one embodiment, the requesters are divided into the owner of the lock, the first waiting contender, and the other waiting contenders. The first waiting contender is made probabilistically more likely to obtain the lock by having it spin faster than the other waiting contenders. Because the other waiting contenders spin more slowly, the first waiting contender is more likely to be able to observe the free lock and acquire it before the other waiting contenders notice that it is free. The first of the other waiting contenders that determines that the previous first waiting contender has acquired the lock is promoted to be the new first waiting contender and begins spinning fast. Because only the first waiting contender is spinning fast on the lock, it is probable that only the first waiting contender will attempt to acquire the lock when it becomes available.

System and method for accessing a shared computer resource using a lock featuring different spin speeds corresponding to multiple states

A system and method for storing error correction check words in computer memory modules. Check bits stored in physically adjacent locations within a dynamic random access memory (DRAM) chip are assigned to different check words. By assigning check bits to check words in this manner, multi-bit soft errors resulting from errors in two or more check bits stored in physically adjacent memory locations will appear as single-bit errors to an error correction subsystem. Similarly, the likelihood of multi-bit errors occurring in the same check word may be reduced.

System and method for improving multi-bit error protection in computer memory systems

A pending tag system and method to maintain data coherence in a processing node during pending transactions in a transaction pipeline. A pending tag storage unit may be coupled to a cache controller and configured to store pending tags each indicative of a coherence state for a data line corresponding to a pending transaction within the transaction pipeline. The pending tag storage unit includes a total amount of storage which is substantially less than an amount required to store tags contained in the full tag array for the cache memory. When a pending tag exists in the pending tag storage unit, the coherence state of the corresponding data line within the cache memory is dictated by the pending tag for snoop operations. Accordingly, data coherence is maintained during the period when transactions are pending, e.g., not yet presented to a processor and cache. When a pending transaction is completed, the coherence state of the corresponding data line as indicated by the fill tag array may be overwritten by the coherence state as indicated by the pending tag and the pending tag may deleted from the pending tag storage.

Multiprocessing system employing pending tags to maintain cache coherence

Hybrid queue and backoff computer resource lock featuring different spin

A system for N-bit part failure detection using n-bit error detecting codes where n is less than N is disclosed. In a computer system having storage devices N bits wide and an error detection and correction capability of less than N bits, bit assignments are made so that storage device failures will be detectable because of the manner the effect of a part failure is distributed among multiple codewords. Consequently 8 and 16 bit wide DRAMs may be used in a memory system using error detection and correction codes which are not capable of detecting 8 or 16 bit errors in a codeword, and still preserve the ability to detect the worst errors possibly caused by a part failure. Further, since error detection and correction codes with a predefined error detection and correction capability generally do not double in number of bits required when the data portion of a codeword doubles, the present invention allows use of the remaining bits when using larger data words, not only for special data, but also for another error detection and correction code for the special data, all still preserving the ability to detect any part failures, even when a part failure causes a number of total bit errors far exceeding the error detection capability of the error detection and correction codes.

Growing community of inventors

Redwood City, CA, United States of America

Ashok Singhal