Unisys Corporation

Ashley K Wise

Christopher M Cischke

David A Bjur

Various approaches for generating input data for simulating a circuit design are disclosed. In one approach, a test generator program is generated from a main program that uses a test generator class library. The test generator class library includes a software driver class corresponding to the hardware driver, and the software driver class includes a storage class corresponding to each memory within the hardware driver, a first set including at least one method for writing function codes to a first object of the storage class, and a second set including at least one method for writing data to a second object of the storage class. Function codes are written to the first object of the storage class in response to a call by the test generator program to a method in the first set. Data of a first type is written to the second object of the storage class in response to a call by the test generator program to a method in the second set, wherein the data of the first type is data to be provided by the driver as input to the simulated circuit design.

Generation of tests used in simulating an electronic circuit design

A portable scalable performance monitoring system is provided for monitoring the performance of one or more data processing systems in real time. The portable scalable performance monitoring system may include data capture and control mechanisms such as data sampling, data selection, data buffering, and data communication to facilitate the monitoring of the one or more data processing systems in real or near real time. Furthermore, the portable scalable performance monitoring system may include multiple levels of data collection and control to increase scalability.

Performance monitor for data processing systems

An apparatus for and method of generating test cases for testing simulated logic circuit designs. The test cases are basically generated automatically in a random fashion, manually, or using some combination of automatic and manual techniques. Each test case has a corresponding success indication. These test cases are provided to the simulated logic design for execution. Following execution, each test case is rated pass or fail by comparison of the result with the corresponding success indication and a reason for failure is recorded for each failure. A significantly smaller list of test cases is prepared by eliminating test cases which do not have a unique reason for failure. The smaller list of test cases is then presented for a simulation run which requires substantially less simulator time and substantially less manual analysis of the results.

Method and apparatus for choosing tests for simulation and associated algorithms and hierarchical bipartite graph data structure

A method and apparatus for processing numerical values in a computer program. In various embodiments, the invention provides an arbitrary and expandable high-precision datatype. The datatype encapsulates large-integer data and associated operators. The large-integer data has runtime expandable precision, and the operations perform functions on large-integer data and system integer data in a manner that is functionally equivalent to corresponding language-provided integer operations. The language-provided integer operations are overloaded with the operations of the large-integer datatype, whereby a user is unburdened with special commands and syntax, and large-integer data is inter-operable with system integer data.

Growing community of inventors

Blaine, MN, United States of America

Ashley K Wise